TLV5627CDR Datasheet, PDF (1/23 Pages) Texas Instruments – 2.7-V TO 5.5 V 8-BIT 4-CHANNEL DIGITAL-TO-ANALOG CONVERTERS

TLV5627C, TLV5627I
2.7ĆV TO 5.5ĆV 8ĆBIT 4ĆCHANNEL DIGITALĆTOĆANALOG CONVERTERS
WITH POWER DOWN
SLAS232A − JUNE1999 − REVISED JULY 2002
D Four 8-Bit D/A Converters
D Programmable Settling Time
of 2.5 µs or 8.5 µs Typ
D TMS320, (Q)SPI, and Microwire
Compatible Serial Interface
D Low Power Consumption:
7 mW, Slow Mode − 5-V Supply
3 mW, Slow Mode − 3-V Supply
D Reference Input Buffers
D Monotonic Over Temperature
D Dual 2.7-V to 5.5-V Supply (Separate Digital
and Analog Supplies)
D Hardware Power Down
D Software Power Down
D Simultaneous Update
applications
D Battery Powered Test Instruments
D Digital Offset and Gain Adjustment
D Industrial Process Controls
D Machine and Motion Control Devices
D Arbitrary Waveform Generation
description
D OR PW PACKAGE
(TOP VIEW)
The TLV5627 is a four channel, 8-bit voltage
output digital-to-analog converter (DAC) with a
flexible 4-wire serial interface. The 4-wire serial
interface allows glueless interface to TMS320,
DV_DD 1
PD 2
LDAC 3
16 AV_DD
15 REFINAB
14 OUTA
SPI, QSPI, and Microwire serial ports. The
DIN 4 13 OUTB
TLV5627 is programmed with a 16-bit serial word
SCLK 5 12 OUTC
comprised of a DAC address, individual DAC
CS 6
11 OUTD
control bits, and an 8-bit DAC value.
FS 7 10 REFINCD
The device has provision for two supplies: one
DGND 8
9 AGND
digital supply for the serial interface (via pins
DV_DD and DGND), and one for the DACs,
reference buffers and output buffers (via pins AV_DD and AGND). Each supply is independent of the other, and
can be any value between 2.7 V and 5.5 V. The dual supplies allow a typical application where the DAC will be
controlled via a microprocessor operating on a 3-V supply (also used on pins DV_DD and DGND), with the DACs
operating on a 5-V supply. The digital and analog supplies can be tied together.
The resistor string output voltage is buffered by an x2 gain rail-to-rail output buffer. The buffer features a
Class AB output stage to improve stability and reduce settling time. A rail-to-rail output stage and a power-down
mode make it ideal for single voltage, battery based applications. The settling time of the DAC is programmable
to allow the designer to optimize speed versus power dissipation. The settling time is chosen by the control bits
within the 16-bit serial input string. A high-impedance buffer is integrated on the REFINAB and REFINCD
terminals to reduce the need for a low source impedance drive to the terminal. REFINAB and REFINCD allow
DACs A and B to have a different reference voltage than DACs C and D.
The device, implemented with a CMOS process, is available in 16-terminal SOIC and TSSOP packages. The
TLV5627C is characterized for operation from 0°C to 70°C. The TLV5627I is characterized for operation from
−40°C to 85°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
SPI and QSPI are trademarks of Motorola, Inc.
Microwire is a trademark of National Semiconductor Corporation.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright  2002, Texas Instruments Incorporated
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
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