THS5651A_09 Datasheet, PDF (1/33 Pages) Texas Instruments – 10-BIT, 125 MSPS, CommsDAC DIGITAL-TO-ANALOG CONVERTER

D Member of the Pin-Compatible
CommsDAC Product Family
D 125 MSPS Update Rate
D 10-Bit Resolution
D Superior Spurious Free Dynamic Range
Performance (SFDR) to Nyquist at 40 MHz
Output: 62 dBc
D 1 ns Setup/Hold Time
D Differential Scalable Current Outputs: 2 mA
to 20 mA
D On-Chip 1.2-V Reference
D 3 V and 5 V CMOS-Compatible Digital
Interface
D Straight Binary or Twos Complement Input
D Power Dissipation: 175 mW at 5 V, Sleep
Mode: 25 mW at 5 V
D Package: 28-Pin SOIC and TSSOP
THS5651A
10ĆBIT, 125 MSPS, CommsDAC
DIGITALĆTOĆANALOG CONVERTER
SLAS260A − FEBRUARY 2000 − REVISED SEPTEMBER 2002
SOIC (DW) OR TSSOP (PW) PACKAGE
(TOP VIEW)
D9
1
D8
2
D7
3
D6
4
D5
5
D4
6
D3
7
D2
8
D1
9
D0
10
NC
11
NC
12
NC
13
NC
14
28
CLK
27
DV_DD
26
DGND
25
MODE
24
AV_DD
23
COMP2
22
IOUT1
21
IOUT2
20
AGND
19
COMP1
18
BIASJ
17
EXTIO
16
EXTLO
15
SLEEP
NC − No internal connection
description
The THS5651A is a 10-bit resolution digital-to-analog converter (DAC) specifically optimized for digital data
transmission in wired and wireless communication systems. The 10-bit DAC is a member of the CommsDAC
series of high-speed, low-power CMOS digital-to-analog converters. The CommsDAC family consists of pin
compatible 14-, 12-, 10-, and 8-bit DACs. All devices offer identical interface options, small outline package and
pinout. The THS5651A offers superior ac and dc performance while supporting update rates up to 125 MSPS.
The THS5651A operates from an analog supply of 4.5 V to 5.5 V. Its inherent low power dissipation of 175 mW
ensures that the device is well suited for portable and low-power applications. Lowering the full-scale current
output reduces the power dissipation without significantly degrading performance. The device features a
SLEEP mode, which reduces the standby power to approximately 25 mW, thereby optimizing the power
consumption for system needs.
The THS5651A is manufactured in Texas Instruments advanced high-speed mixed-signal CMOS process. A
current-source-array architecture combined with simultaneous switching shows excellent dynamic
performance. On-chip edge-triggered input latches and a 1.2 V temperature compensated bandgap reference
provide a complete monolithic DAC solution. The digital supply range of 3 V to 5.5 V supports 3 V and 5 V CMOS
logic families. Minimum data input setup and hold times allow for easy interfacing with external logic. The
THS5651A supports both a straight binary and twos complement input word format, enabling flexible interfacing
with digital signal processors.
The THS5651A provides a nominal full-scale differential output current of 20 mA and >300 kΩ output
impedance, supporting both single-ended and differential applications. The output current can be directly fed
to the load (e.g., external resistor load or transformer), with no additional external output buffer required. An
accurate on-chip reference and control amplifier allows the user to adjust this output current from 20 mA down
to 2 mA, with no significant degradation of performance. This reduces power consumption and provides 20 dB
gain range control capabilities. Alternatively, an external reference voltage and control amplifier may be applied
in applications using a multiplying DAC. The output voltage compliance range is 1.25 V.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
CommsDAC is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright  2002, Texas Instruments Incorporated
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
1