TFP410-EP Datasheet, PDF (1/31 Pages) Texas Instruments – PanelBus™ DIGITAL TRANSMITTER

TFP410-EP
PanelBus™ DIGITAL TRANSMITTER
SGLS344A − JULY 2006 − REVISED MAY 2011
D Controlled Baseline
− One Assembly
− One Test Site
− One Fabrication Site
D Extended Temperature Performance of
−55°C to 125°C
D Enhanced Diminishing Manufacturing
Sources (DMS) Support
D Enhanced Product-Change Notification
D Qualification Pedigree^†
D Digital Visual Interface (DVI) Compliant⁽¹⁾
D Supports Pixel Rates Up to 165MHz
(Including 1080p and WUXGA at 60Hz)
D Universal Graphics Controller Interface
− 12-Bit Dual-Edge and 24-Bit Single-Edge
Input Modes
− Adjustable 1.1-V to 1.8-V and Standard
3.3-V CMOS Input Signal Levels
− Fully Differential and Single-Ended Input
Clocking Modes
− Standard Intelt 12-Bit Digital Video Port
Compatible as on Intel 81x Chipsets
D Enhanced PLL Noise Immunity
− On-Chip Regulators and Bypass
Capacitors for Reducing System Costs
D Enhanced Jitter Performance
− No HSYNC Jitter Anomaly
− Negligible Data-Dependent Jitter
D Programmable Using I²C Serial Interface
D Monitor Detection Through Hot-Plug and
Receiver Detection
D Single 3.3-V Supply Operation
D 64-Pin Thin Quad Flat Pack (TQFP) Using
TI’s PowerPAD™ Package
D TI Advanced 0.18-μm EPIC-5™ CMOS
Process Technology
D Pin Compatible With SiI164 DVI Transmitter
† _{Component qualification in accordance with JEDEC and industry}
standards to ensure reliable operation over an extended
temperature range. This includes, but is not limited to, Highly
Accelerated Stress Test (HAST) or biased 85/85, temperature
cycle, autoclave or unbiased HAST, electromigration, bond
intermetallic life, and mold compound life. Such qualification
testing should not be viewed as justifying use of this component
beyond specified performance and environmental limits.
description
The TFP410 is a Texas Instruments PanelBust flat panel display product, part of a comprehensive family of
end-to-end digital visual interface (DVI) 1.0-compliant solutions, targeted at the PC and consumer electronics
industry.
The TFP410 provides a universal interface to allow a glueless connection to most commonly available graphics
controllers. Some of the advantages of this universal interface include selectable bus widths, adjustable signal
levels, and differential and single-ended clocking. The adjustable 1.1-V to 1.8-V digital interface provides a
low-EMI, high-speed bus that connects seamlessly with 12-bit or 24-bit interfaces. The DVI interface supports
flat panel display resolutions up to UXGA at 165 MHz in 24-bit true color pixel format.
The TFP410 combines PanelBus circuit innovation with TI advanced 0.18-μm EPIC-5 CMOS process
technology and ultralow ground inductance PowerPADt package. The result is a compact 64-pin thin quad flat
pack (TQFP) package providing a reliable, low-current, low-noise, high-speed digital interface solution.
ORDERING INFORMATION
T_A
PACKAGE^†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
−55°C to 125°C PAP − TQFP Tape and reel TFP410MPAPREP
TFP410MEP
† _{Package drawings, standard packing quantities, thermal data, symbolization, and PCB design}
guidelines are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1. The digital visual interface (DVI) specification is an industry standard developed by the digital display working group (DDWG) for high-speed
digital connection to digital displays and has been adopted by industry-leading PC and consumer electronics manufacturers. The TFP410
is compliant to the DVI Revision 1.0 specification.
PanelBus, PowerPAD, and EPIC-5 are trademarks of Texas Instruments.
VESA is a trademark of Video Electronics Standards Association.
Intel is a trademark of Intel Corporation.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright © 2006 − 2011, Texas Instruments Incorporated
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
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