TDA2 Datasheet, PDF (1/4 Pages) Texas Instruments – ADAS Applications Processor TDA2x System-on-Chip Technical Brief

TDA2
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ADAS Applications Processor
TDA2x System-on-Chip Technical Brief
SPRT680 – OCTOBER 2013
1 Advanced Driver Assistance System (ADAS) TDA2x System-on-Chip
1.1 Features
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• Architecture Designed for ADAS Applications
– Best-in-Class CPU Performance
– State-of-the-Art Integrated Power
Management
– Video, Image, and Graphics Processing
Support
• Streaming Full-HD Video (1920x1080p, 60
fps)
• Multiple Video Input and Video Output
• 2D and 3D Graphics
• ARM® Dual Cortex™-A15 Microprocessor
Subsystem
• C66x™ Floating-Point VLIW DSP
– Fully Object-Code Compatible with C67x™
and C64x+™
– Up to Thirty-two 16 x 16-bit Fixed-point
Multiplies per Cycle
• Up to 2.5 MiB of On-Chip L3 RAM
• 768-Bit Interface to Internal RAM
• Level 3 (L3) and Level 4 (L4) Interconnects
• Two DDR2/DDR3 Memory Interface (EMIF)
Modules
– Supports up to DDR2-667 and DDR3-667
– Up to 2-GiB Supported per EMIF
• ARM Cortex™-M4 Image Processor (IPU)
– Two Dual-core, 200 MHz per Core
• Vision AccelerationPac
– Up to Four Embedded Vision Engines (EVEs)
• IVA-HD Subsystem
• Display Subsystem
– Display Controller with DMA Engine and Up
to Three Pipelines
– HDMI Encoder: HDMI 1.4a, HDCP 1.4, and
DVI 1.0 Compliant
• 2D-Graphics Accelerator (BB2D) Subsystem
– Vivante™ GC320 Core
• Video Processing Engine (VPE)
• Available Dual-Core PowerVR® SGX544™ 3D
GPU
• Up to 3 Video Input Port (VIP) Module Instances
– Support for Up to 10 Multiplexed Input Ports
• Available Programmable Real-time Unit (PRU)
Subsystem
– Interrupt Controller Supporting 64 Input
Events
• General-Purpose Memory Controller (GPMC)
• Enhanced Direct Memory Access (EDMA)
Controller
• 3-Port Gigabit Ethernet (GMAC)
– Up to Two External Ports, One Internal
• Dual Controller Area Network (DCAN) Modules
– CAN 2.0B Protocol
• PCI Express 2.0 Port with Integrated PHY
– Single Port With 1 Lane at 5.0 Gbps
• Sixteen 32-Bit General-Purpose Timers
• 32-Bit MPU Watchdog Timer
• Ten Configurable UART/IrDA/CIR Modules
• Four Multichannel Serial Peripheral Interfaces
(MCSPIs)
• Five Inter-Integrated Circuit (I²C) Ports
• Multichannel Audio Serial Port (MCASP)
• Up to 256 General-Purpose I/O (GPIO) Pins
• Power, Reset, and Clock Management
– SmartReflex™ Class-1 Technology
– Multiple Independent Core Power Domains
– Multiple Independent Core Voltage Domains
– Clock Management (CM) Allows Reduction
of Dynamic Consumption
• On-Chip Debug with CTools Technology
• Automotive AEC-Q100 Qualified
• 28-nm CMOS Technology
• The ADAS Vision28 Will Be Offered with Two
Package Options:
– 23-mm Package (ABC Suffix)
• Ball Grid Array (BGA)
• 0.8-mm Ball Pitch with Via Channel Array
(VCA)
• Partial Grid
• 760 Device Pins
– 17-mm Package (AAS Suffix)
• BGA
• 0.65-mm Ball Pitch with Microvia
• Full Grid
• 625 Device Pins
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