TB5D1M_17 Datasheet, PDF (1/21 Pages) Texas Instruments – QUAD DIFFERENTIAL PECL DRIVERS

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TB5D1M, TB5D2H
SLLS579C – SEPTEMBER 2003 – REVISED JANUARY 2008
QUAD DIFFERENTIAL PECL DRIVERS
FEATURES
1
• Functional Replacements for the Agere
BDG1A, BPNGA and BDGLA
• Pin-Equivalent to the General-Trade 26LS31
Device
• 2.0 ns Maximum Propagation Delays
• 0.15 ns Output Skew Typical Between Pairs
• Capable of Driving 50-Ω Loads
• 5.0-V or 3.3-V Supply Operation
• TB5D1M Includes Surge Protection on
Differential Outputs
• TB5D2H No Line Loading When V_CC = 0
• Third State Output Capability
• -40C to 85C Operating Temp Range
• ESD Protection HBM > 3 kV and CDM > 2 kV
• Available in Gull-Wing SOIC (JEDEC MS-013,
DW) and SOIC (D) Packages
APPLICATIONS
• Digital Data or Clock Transmission Over
Balanced Transmission Lines
DESCRIPTION
These quad differential drivers are TTL input to
pseudo-ECL differential output used for digital data
transmission over balanced transmission lines.
The TB5D1M device is a pin and functional
replacement for the Agere systems BDG1A and
BPNGA quad differential drivers. The TB5D1M has a
built-in lightning protection circuit to absorb large
transitions on the transmission lines without
destroying the device. When the circuit is powered
down it loads the transmission line, because of the
protection circuit.
The TB5D2H device is a pin and functional
replacement for the Agere systems BDG1A and
BDGLA quad differential drivers. Upon power down
the TB5D2H output circuit appears as an open circuit
and does not load the transmission line.
Both drivers feature a 3-state output with a third-state
level of less than 0.1 V.
The packaging options available for these quad
differential line drivers include a 16-pin SOIC
gull-wing (DW) and a 16-pin SOIC (D) package.
Both drivers are characterized for operation from
-40C to 85C
The logic inputs of this device include internal pull-up
resistors of approximately 40 kΩ that are connected
to V_CC to ensure a logical high level input if the inputs
are open circuited.
AI
AO
AO
E1
BO
BO
BI
GND
DW AND D PACKAGE
(TOP VIEW)
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
V _CC
DI
DO
DO
E2
CO
CO
CI
FUNCTIONAL DIAGRAM
AO
AI
AO
BO
BI
BO
CO
CI
CO
DO
DI
DO
E1
E2
ENABLE TRUTH TABLE
E1 E2 Condition
0
0
Active
1
0
Active
0
1 Disabled
1
1
Active
1
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Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2003–2008, Texas Instruments Incorporated