SN75ALS193DR Datasheet, PDF (1/19 Pages) Texas Instruments – QUADRUPLE DIFFERENTIAL LINE RECEIVER

SN75ALS193
QUADRUPLE DIFFERENTIAL LINE RECEIVER
D Meets or Exceeds ANSI Standard
EIA/TIA-422-B and EIA/TIA-423-A and ITU
Recommendations V.10 and V.11
D Designed for Multipoint Bus Transmission
on Long Bus Lines in Noisy Environments
D 3-State Outputs
D Common-Mode Input Voltage Range
– 7 V to 7 V
D Input Sensitivity . . . ± 200 mV
D Input Hysteresis . . . 120 mV Typ
D High Input Impedance . . . 12 kΩ Min
D Operates from Single 5-V Supply
D Low Supply Current Requirement
35 mA Max
D Improved Speed and Power Version of the
AM26LS32A
SLLS008D – JUNE 1986 – REVISED MAY 1995
SN75ALS193 . . . D, J OR N PACKAGE
(TOP VIEW)
1B 1
1A 2
1Y 3
G4
2Y 5
2A 6
2B 7
GND 8
16 V_CC
15 4B
14 4A
13 4Y
12 G
11 3Y
10 3A
9 3B
description
The SN75ALS193 is a monolithic quadruple line receiver with 3-state outputs designed using advanced
low-power Schottky technology. This technology provides combined improvements in bar design, tooling
production, and wafer fabrication. This, in turn, provides significantly lower power requirements and permits
much higher data throughput than other designs. This device meets the specifications of ANSI Standards
EIA/TIA-422-B and EIA/TIA-423-A and ITU Recommendations V.10 and V.11. It features 3-state outputs that
permit direct connection to a bus-organized system with a fail-safe design that ensures the outputs will always
be high if the inputs are open.
The device is optimized for balanced multipoint bus transmission at rates up to 20 megabits per second. The
input features high input impedance, input hysteresis for increased noise immunity, and an input sensitivity of
± 200 mV over a common-mode input voltage range of – 7 to 7 V. It also features active-high and active-low
enable functions that are common to the four channels. The SN75ALS193 is designed for optimum performance
when used with the ’ALS192 quadruple differential line driver.
The SN75ALS193 is characterized for operation from 0°C to 70°C.
FUNCTION TABLE
(each receiver)
DIFFERENTIAL INPUTS
A–B
ENABLES
G
G
OUTPUT
Y
VID ≥ 0.2 V
H
X
H
X
L
H
– 0.2 V < VID < 0.2 V
H
X
X
L
?
?
VID ≤ – 0.2 V
H
X
L
X
L
L
X
L
H
Z
Open
H
X
H
X
L
H
H = high level, L = low level, X = irrelevant, ? = indeterminate,
Z = high impedance (off)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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Copyright © 1995, Texas Instruments Incorporated
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