SN74TVC3306_15 Datasheet, PDF (1/19 Pages) Texas Instruments – SN74TVC3306 Dual Voltage Clamp

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SN74TVC3306
SCDS112D – MARCH 2001 – REVISED DECEMBER 2014
SN74TVC3306 Dual Voltage Clamp
1 Features
•1 Designed to Be Used in Voltage-Limiting
Applications
• 3.5-Ω On-State Connection Between
Ports A and B
• Flow-Through Pinout for Ease of Printed Circuit
Board Trace Routing
• Direct Interface With GTL+ Levels
• Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
• ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model
– 200-V Machine Model
– 1000-V Charged-Device Model
2 Applications
• Voltage Level Translation
• Signal Switching
• Bus Isolation
3 Description
The SN74TVC3306 device provides three parallel
NMOS pass transistors with a common unbuffered
gate. The low on-state resistance of the switch allows
connections to be made with minimal propagation
delay.
The device can be used as a dual switch, with the
gates cascaded together to a reference transistor.
The low-voltage side of each pass transistor is limited
to a voltage set by the reference transistor. This is
done to protect components with inputs that are
sensitive to high-state voltage-level overshoots.
Device Information⁽¹⁾
PART NUMBER
PACKAGE
BODY SIZE (NOM)
SN74TVC3306
SM8 (8)
US8 (8)
3.00 mm x 2.80 mm
2.30 mm x 2.00 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
4 Simplified Schematic
GATE
B1
8
7
B2
B3
6
5
1
2
3
4
GND
A1
A2
A3
The SN74TVC3306 device has bidirectional capability across many voltage levels. The voltage levels documented in
this data sheet are examples.
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.