SN74S1053NSR Datasheet, PDF (1/18 Pages) Texas Instruments – 16-BIT SCHOTTKY BARRIER DIODE BUS-TERMINATION ARRAY

D Designed to Reduce Reflection Noise
D Repetitive Peak Forward Current to 200 mA
D 16-Bit Array Structure Suited for
Bus-Oriented Systems
D Package Options Include Plastic
Small-Outline Packages and Standard
Plastic 300-mil DIPs
description
This Schottky barrier diode bus-termination array
is designed to reduce reflection noise on memory
bus lines. This device consists of a 16-bit
high-speed Schottky diode array suitable for
clamping to V_CC and/or GND.
The SN74S1053 is characterized for operation
from 0°C to 70°C.
SN74S1053
16-BIT SCHOTTKY BARRIER DIODE
BUS-TERMINATION ARRAY
SDLS017A – SEPTEMBER 1990 – REVISED AUGUST 1997
DW OR N PACKAGE
(TOP VIEW)
V_CC 1
D01 2
D02 3
D03 4
D04 5
D05 6
D06 7
D07 ⁸
D08 ⁹
GND ¹⁰
20 V_CC
19 D16
18 D15
17 D14
16 D13
15 D12
14 D11
13 _D10
12 _D09
11 _GND
schematic diagrams
D01 D02 D03 D04 D05 D06 D07 D08 D09 D10 D11 D12 D13 D14 D15 D16
2
3
4
5
6
7
8
9 12 13 14 15 16 17 18 19
VCC VCC
1
20
10 11
GND GND
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright © 1997, Texas Instruments Incorporated
1