SN74LVTZ240 Datasheet, PDF (1/10 Pages) Texas Instruments – 3.3-V ABT OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

SN54LVTZ240, SN74LVTZ240
3.3ĆV ABT OCTAL BUFFERS/DRIVERS
WITH 3ĆSTATE OUTPUTS
SCBS301B − SEPTEMBER 1993 − REVISED JULY 1995
D State-of-the-Art Advanced BiCMOS
Technology (ABT) Design for 3.3-V
Operation and Low-Static Power
Dissipation
D High-Impedance State During Power Up
and Power Down
D Support Mixed-Mode Signal Operation (5-V
Input and Output Voltages With 3.3-V V_CC)
D Support Unregulated Battery Operation
Down to 2.7 V
D Typical V_OLP (Output Ground Bounce)
< 0.8 V at V_CC = 3.3 V, T_A = 25°C
D Latch-Up Performance Exceeds 500 mA
Per JEDEC Standard JESD-17
D Bus-Hold Data Inputs Eliminate the Need
for External Pullup Resistors
D Package Options Include Plastic
Small-Outline (DW), Shrink Small-Outline
(DB), and Thin Shrink Small-Outline (PW)
Packages, Ceramic Chip Carriers (FK), and
Ceramic (J) DIPs
description
These octal buffers and line drivers are designed
specifically for low-voltage (3.3-V) V_CC operation,
but with the capability to provide a TTL interface
to a 5-V system environment.
SN54LVTZ240 . . . J PACKAGE
SN74LVTZ240 . . . DB, DW, OR PW PACKAGE
(TOP VIEW)
1OE ₁
1A1 ₂
2Y4 3
1A2 4
2Y3 5
1A3 6
2Y2 7
1A4 8
2Y1 9
GND 10
20 ^V_CC
19 ^2OE
18 1Y1
17 2A4
16 1Y2
15 2A3
14 1Y3
13 2A2
12 1Y4
11 2A1
SN54LVTZ240 . . . FK PACKAGE
(TOP VIEW)
1A2
3 2 1 20 19
4
18
1Y1
2Y3 ₅
17 ^2A4
1A3 6
16 1Y2
2Y2 7
15 2A3
1A4 8
14 1Y3
9 10 11 12 13
These devices are organized as two 4-bit line drivers with separate output-enable (OE) inputs. When OE is low,
the device passes data from the A inputs to the Y outputs. When OE is high, the outputs are in the
high-impedance state.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
The SN74LVTZ240 is available in TI’s shrink small-outline package (DB), which provides the same I/O pin count
and functionality of standard small-outline packages in less than half the printed-circuit-board area.
The SN54LVTZ240 is characterized for operation over the full military temperature range of − 55°C to 125°C.
The SN74LVTZ240 is characterized for operation from − 40°C to 85°C.
FUNCTION TABLE
(each buffer)
INPUTS
OE
A
OUTPUT
Y
L
H
L
L
L
H
H
X
Z
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
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Copyright  1995, Texas Instruments Incorporated
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