SN74LVTH245A-EP Datasheet, PDF (1/13 Pages) Texas Instruments – 3.3-V ABT OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS

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FEATURES
• Controlled Baseline
– One Assembly/Test Site, One Fabrication
Site
• Enhanced Diminishing Manufacturing
Sources (DMS) Support
• Enhanced Product-Change Notification
• Qualification Pedigree ⁽¹⁾
• Supports Mixed-Mode Signal Operation (5-V
Input and Output Voltages With 3.3-V V_CC)
• Typical V_OLP (Output Ground Bounce)
<0.8 V at V_CC = 3.3 V, T_A = 25°C
• Supports Unregulated Battery Operation
Down to 2.7 V
• I_off and Power-Up 3-State Support Hot
Insertion
• Bus Hold on Data Inputs Eliminates the Need
for External Pullup/Pulldown Resistors
• Latch-Up Performance Exceeds 500 mA Per
JESD 17
(1) Component qualification in accordance with JEDEC and
industry standards to ensure reliable operation over an
extended temperature range. This includes, but is not limited
to, Highly Accelerated Stress Test (HAST) or biased 85/85,
temperature cycle, autoclave or unbiased HAST,
electromigration, bond intermetallic life, and mold compound
life. Such qualification testing should not be viewed as
justifying use of this component beyond specified
performance and environmental limits.
SN74LVTH245A-EP
3.3-V ABT OCTAL BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
SCBS768A – NOVEMBER 2003 – REVISED JUNE 2006
• ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
DB OR PW PACKAGE
(TOP VIEW)
DIR 1
A1 2
A2 3
A3 4
A4 5
A5 6
A6 7
A7 8
A8 ⁹
GND ¹⁰
20 V_CC
19 OE
18 B1
17 B2
16 B3
15 B4
14 B5
13 B6
12 _B7
11 _B8
DESCRIPTION/ORDERING INFORMATION
This octal bus transceiver is designed specifically for low-voltage (3.3-V) V_CC operation, but with the capability to
provide a TTL interface to a 5-V system environment.
This device is designed for asynchronous communication between data buses. It transmits data from the A bus
to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The
output-enable (OE) input can be used to disable the device so the buses are effectively isolated.
To ensure the high-impedance state during power up or power down, OE should be tied to V_CC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. Use of pullup or
pulldown resistors with the bus-hold circuitry is not recommended.
This device is fully specified for hot-insertion applications using I_off and power-up 3-state. The I_off circuitry
disables the outputs, preventing damaging current backflow through the device when it is powered down. The
power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,
which prevents driver conflict.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2003–2006, Texas Instruments Incorporated