SN74LVTH16373-EP Datasheet, PDF (1/12 Pages) Texas Instruments – 3.30V ABT 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS

SN74LVTH16373ĆEP
3.3ĆV ABT 16ĆBIT TRANSPARENT DĆTYPE LATCH
WITH 3ĆSTATE OUTPUTS
SCBS778A − NOVEMBER 2003 − REVISED MARCH 2004
D Controlled Baseline
− One Assembly/Test Site, One Fabrication
Site
D Enhanced Diminishing Manufacturing
Sources (DMS) Support
D Enhanced Product-Change Notification
D Qualification Pedigree^†
D Member of the Texas Instruments
Widebus  Family
D State-of-the-Art Advanced BiCMOS
Technology (ABT) Design for 3.3-V
Operation and Low Static-Power
Dissipation
D Supports Mixed-Mode Signal Operation
(5-V Input and Output Voltages With
3.3-V V_CC )
D Supports Unregulated Battery Operation
Down to 2.7 V
D Typical V_OLP (Output Ground Bounce)
<0.8 V at V_CC = 3.3 V, T_A = 25°C
D I_off and Power-Up 3-State Support Hot
Insertion
D Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors
D Distributed V_CC and GND Pins Minimize
High-Speed Switching Noise
† _{Component qualification in accordance with JEDEC and industry}
standards to ensure reliable operation over an extended
temperature range. This includes, but is not limited to, Highly
Accelerated Stress Test (HAST) or biased 85/85, temperature
cycle, autoclave or unbiased HAST, electromigration, bond
intermetallic life, and mold compound life. Such qualification
testing should not be viewed as justifying use of this component
beyond specified performance and environmental limits.
D Flow-Through Architecture Optimizes PCB
Layout
D Latch-Up Performance Exceeds 500 mA Per
JESD 17
D ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
DGG OR DL PACKAGE
(TOP VIEW)
1OE 1
1Q1 2
1Q2 3
GND 4
1Q3 5
1Q4 6
V_CC 7
1Q5 8
1Q6 9
GND 10
1Q7 11
1Q8 12
2Q1 13
2Q2 14
GND 15
2Q3 16
2Q4 17
V_CC 18
2Q5 19
2Q6 20
GND 21
2Q7 22
2Q8 ²³
2OE ²⁴
48 1LE
47 1D1
46 1D2
45 GND
44 1D3
43 1D4
42 V_CC
41 1D5
40 1D6
39 GND
38 1D7
37 1D8
36 2D1
35 2D2
34 GND
33 2D3
32 2D4
31 V_CC
30 2D5
29 2D6
28 GND
27 2D7
26 _2D8
25 _2LE
description/ordering information
The SN74LVTH16373 is a 16-bit transparent D-type latch with 3-state outputs designed for low-voltage (3.3-V)
V_CC operation, but with the capability to provide a TTL interface to a 5-V system environment. This device is
particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
This device can be used as two 8-bit latches or one 16-bit latch. When the latch-enable (LE) input is high, the
Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the levels set up at the
D inputs.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright  2004, Texas Instruments Incorporated
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