SN74LVTH162245ADL Datasheet, PDF (1/20 Pages) Texas Instruments – 3.3-V ABT 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

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FEATURES
• Members of the Texas Instruments Widebus™
Family
• A-Port Outputs Have Equivalent 22-Ω Series
Resistors, So No External Resistors Are
Required
• Support Mixed-Mode Signal Operation (5-V
Input and Output Voltages With 3.3-V V_CC)
• Support Unregulated Battery Operation Down
to 2.7 V
• Typical V_OLP (Output Ground Bounce) <0.8 V
at V_CC = 3.3 V, T_A = 25°C
• I_off and Power-Up 3-State Support Hot
Insertion
• Bus Hold on Data Inputs Eliminates the Need
for External Pullup/Pulldown Resistors
• Distributed V_CC and GND Pins Minimize
High-Speed Switching Noise
• Flow-Through Architecture Optimizes PCB
Layout
• Latch-Up Performance Exceeds 500 mA Per
JESD 17
• ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
SN54LVTH162245, SN74LVTH162245
3.3-V ABT 16-BIT BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS260Q – JUNE 1993 – REVISED NOVEMBER 2006
SN54LVTH162245 . . . WD PACKAGE
SN74LVTH162245 . . . DGG OR DL PACKAGE
(TOP VIEW)
1DIR ¹
1B1 ²
1B2 ³
GND ⁴
1B3 ⁵
1B4 ⁶
V_CC ⁷
1B5 ⁸
1B6 ⁹
GND ¹⁰
1B7 11
1B8 12
2B1 13
2B2 14
GND 15
2B3 16
2B4 17
V_CC 18
2B5 19
2B6 20
GND 21
2B7 22
2B8 23
2DIR 24
48 _1OE
47 _1A1
46 _1A2
45 _GND
44 _1A3
43 _1A4
42 _VCC
41 _1A5
40 _1A6
39 _GND
38 1A7
37 1A8
36 2A1
35 2A2
34 GND
33 2A3
32 2A4
31 V_CC
30 2A5
29 2A6
28 GND
27 2A7
26 2A8
25 2OE
DESCRIPTION/ORDERING INFORMATION
The 'LVTH162245 devices are 16-bit (dual-octal) noninverting 3-state transceivers designed for low-voltage
(3.3-V) V_CC operation, but with the capability to provide a TTL interface to a 5-V system environment.
These devices can be used as two 8-bit transceivers or one 16-bit transceiver. The devices allow data
transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the
direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so that the buses
are effectively isolated.
The logic levels of the direction-control (DIR) input and the output-enable (OE) input activate either the B-port
outputs or the A-port outputs or place both output ports into the high-impedance mode. The device transmits
data from the A bus to the B bus when the B-port outputs are activated, and from the B bus to the A bus when
the A-port outputs are activated. The input circuitry on both A and B ports is always active and must have a logic
HIGH or LOW level applied to prevent excess I_CC and I_CCZ.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown
resistors with the bus-hold circuitry is not recommended.
The A-port outputs, which are designed to source or sink up to 12 mA, include equivalent 22-Ω series resistors
to reduce overshoot and undershoot.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1993–2006, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are
tested unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.