SN74LVC86A-EP Datasheet, PDF (1/11 Pages) Texas Instruments – QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE

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FEATURES
• Controlled Baseline
– One Assembly/Test Site, One Fabrication
Site
• Extended Temperature Performance of –40°C
to 125°C and –55°C to 125°C
• Enhanced Diminishing Manufacturing Sources
(DMS) Support
• Enhanced Product-Change Notification
• Qualification Pedigree ⁽¹⁾
• Operates From 2 V to 3.6 V
• Inputs Accept Voltages to 5.5 V
(1) Component qualification in accordance with JEDEC and
industry standards to ensure reliable operation over an
extended temperature range. This includes, but is not limited
to, Highly Accelerated Stress Test (HAST) or biased 85/85,
temperature cycle, autoclave or unbiased HAST,
electromigration, bond intermetallic life, and mold compound
life. Such qualification testing should not be viewed as
justifying use of this component beyond specified
performance and environmental limits.
SN74LVC86A-EP
QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE
SCAS752B – DECEMBER 2003 – REVISED JULY 2007
• Max t_pd of 4.6 ns at 3.3 V
• Typical V_OLP (Output Ground Bounce) <0.8 V
at V_CC = 3.3 V, T_A = 25°C
• Typical V_OHV (Output V_OH Undershoot) >2 V at
V_CC = 3.3 V, T_A = 25°C
D OR PW PACKAGE
(TOP VIEW)
1A 1
1B 2
1Y 3
2A 4
2B 5
2Y 6
GND 7
14 V_CC
13 4B
12 _4A
11 4Y
10 3B
9 3A
8 3Y
DESCRIPTION/ORDERING INFORMATION
The SN74LVC86A quadruple 2-input exclusive-OR gate is designed for 2.7-V to 3.6-V V_CC operation.
The device performs the Boolean function Y = A ⊕ B or Y = AB + AB in positive logic.
A common application is as a true/complement element. If one of the inputs is low, the other input is reproduced
in true form at the output. If one of the inputs is high, the signal on the other input is reproduced inverted at the
output.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in
a mixed 3.3-V/5-V system environment.
T_A
–40°C to 125°C
–55°C to 125°C
ORDERING INFORMATION⁽¹⁾
PACKAGE ⁽²⁾
ORDERABLE PART NUMBER
SOIC – D
Reel of 2500
SN74LVC86AQDREP
TSSOP – PW
Reel of 2000
SN74LVC86AQPWREP
SOIC – D
Reel of 2500
SN74LVC86AMDREP
TOP-SIDE MARKING
LVC86AE
LVC86AE
LVC86AM
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
FUNCTION TABLE
(EACH GATE)
INPUTS
A
B
L
L
L
H
H
L
H
H
OUTPUT
Y
L
H
H
L
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2003–2007, Texas Instruments Incorporated