SN74LVC74A-Q1 Datasheet, PDF (1/11 Pages) Texas Instruments – DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET

SN74LVC74A-Q1
www.ti.com ...................................................................................................................................................... SCES481C – AUGUST 2003 – REVISED APRIL 2008
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
WITH CLEAR AND PRESET
FEATURES
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• Qualified for Automotive Applications
• ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
• Operates From 2 V to 3.6 V
• Inputs Accept Voltages to 5.5 V
• Max t_pd of 5.2 ns at 3.3 V
• Typical V_OLP (Output Ground Bounce) <0.8 V at
V_CC = 3.3 V, T_A = 25°C
• Typical V_OHV (Output V_OH Undershoot) >2 V at
V_CC = 3.3 V, T_A = 25°C
D OR PW PACKAGE
(TOP VIEW)
1CLR 1
1D 2
1CLK 3
1PRE 4
1Q 5
1Q ⁶
GND ⁷
14 V_CC
13 2CLR
12 2D
11 2CLK
10 2PRE
9 _2Q
8 _2Q
DESCRIPTION/ORDERING INFORMATION
The SN74LVC74A-Q1 dual positive-edge-triggered D-type flip-flop is designed for 2.7-V to 3.6-V V_CC operation.
A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs, regardless of the levels of the
other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time
requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs
at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval,
data at the D input can be changed without affecting the levels at the outputs.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in
a mixed 3.3-V/5-V system environment.
T_A
–40°C to 125°C
SOIC – D
TSSOP – PW
ORDERING INFORMATION⁽¹⁾
PACKAGE ⁽²⁾
ORDERABLE PART NUMBER
Reel of 2500
SN74LVC74AQDRQ1
Reel of 2000
SN74LVC74AQPWRQ1
TOP-SIDE MARKING
LVC74AQ
LVC74AQ
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
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Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2003–2008, Texas Instruments Incorporated