SN74LVC2G74-Q1_15 Datasheet, PDF (1/14 Pages) Texas Instruments – SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET

SN74LVC2G74-Q1
www.ti.com ........................................................................................................................................................ SCES563C – MARCH 2004 – REVISED APRIL 2008
SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
WITH CLEAR AND PRESET
FEATURES
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• Qualified for Automotive Applications
• Supports 5-V V_CC Operation
• Inputs Accept Voltages to 5.5 V
• Max t_pd of 6.9 ns at 3.3 V
• Low Power Consumption, 10-µA Max I_CC
• ±24-mA Output Drive at 3.3 V
• Typical V_OLP (Output Ground Bounce) <0.8 V at
V_CC = 3.3 V, T_A = 25°C
• Typical V_OHV (Output V_OH Undershoot) >2 V at
V_CC = 3.3 V, T_A = 25°C
• I_off Supports Partial-Power-Down Mode
Operation
• Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
• ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
CLK
D
Q
GND
DCU PACKAGE
(TOP VIEW)
1
8
2
7
3
6
4
5
V_CC
PRE
CLR
Q
DESCRIPTION/ORDERING INFORMATION
This single positive-edge-triggered D-type flip-flop is designed for 1.65-V to 5.5-V V_CC operation.
A low level at the preset (PRE) or clear (CLR) input sets or resets the outputs, regardless of the levels of the
other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time
requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs
at a voltage level and is not related directly to the rise time of the clock pulse. Following the hold-time interval,
data at the D input can be changed without affecting the levels at the outputs.
This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
T_A
–40°C to 125°C
ORDERING INFORMATION⁽¹⁾
PACKAGE ⁽²⁾
ORDERABLE PART NUMBER
VSSOP – DCU
Reel of 3000
SN74LVC2G74QDCURQ1
TOP-SIDE MARKING⁽³⁾
C74_
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
(3) DCU: The actual top-side marking has one additional character that designates the wafer fab/assembly site.
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Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2004–2008, Texas Instruments Incorporated