SN74LVC2G04-EP Datasheet, PDF (1/13 Pages) Texas Instruments – DUAL INVERTER GATE

www.ti.com
SN74LVC2G04-EP
DUAL INVERTER GATE
SGLS365 – AUGUST 2006
FEATURES
• Controlled Baseline
– One Assembly Site
– One Test Site
– One Fabrication Site
• Extended Temperature Performance of –55°C
to 125°C
• Enhanced Diminishing Manufacturing
Sources (DMS) Support
• I_off Supports Partial Power-Down-Mode
Operation
• Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
• ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
• Enhanced Product-Change Notification
• Qualification Pedigree⁽¹⁾
• Available in the Texas Instruments
NanoStar™ and NanoFree™ Packages
• Supports 5-V V_CC Operation
• Inputs Accept Voltages to 5.5 V
• Max t_pd of 4.1 ns at 3.3 V
• Low Power Consumption, 10-µA Max I_CC
• ±24-mA Output Drive at 3.3 V
• Typical V_OLP (Output Ground Bounce) <0.8 V
at V_CC = 3.3 V, T_A = 25°C
• Typical V_OHV (Output V_OH Undershoot) >2 V at
V_CC = 3.3 V, T_A = 25°C
(1) _{Component qualification in accordance with JEDEC and}
industry standards to ensure reliable operation over an
extended temperature range. This includes, but is not limited
to, Highly Accelerated Stress Test (HAST) or biased 85/85,
temperature cycle, autoclave or unbiased HAST,
electromigration, bond intermetallic life, and mold compound
life. Such qualification testing should not be viewed as
justifying use of this component beyond specified
performance and environmental limits.
DBV PACKAGE
(TOP VIEW)
DCK PACKAGE
(TOP VIEW)
DRL PACKAGE
(TOP VIEW)
YEA, YEP, YZA,
OR YZP PACKAGE
(BOTTOM VIEW)
1A
1
GND
2
1A
1
6 1Y
1A 1 6 1Y
2A ^{3 4} 2Y
6
5
1Y
GND
V_CC
2A
2
3
5
V_CC
GND 2
2A 3
5 V_CC
4 2Y
GND ^{2 5 V}CC
1A ^{1 6} 1Y
4 2Y
2A
3
4
2Y
See mechanical drawings for dimensions.
DESCRIPTION/ORDERING INFORMATION
This dual inverter is designed for 1.65-V to 5.5-V V_CC operation. The SN74LVC2G04 performs the Boolean
function Y = A.
NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the
die as the package.
This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar, NanoFree are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2006, Texas Instruments Incorporated