SN74LVC1G99_16 Datasheet, PDF (1/24 Pages) Texas Instruments – Ultra-Configurable Multiple-Function Gate With 3-State Output

SN74LVC1G99
www.ti.com
SCES609G – SEPTEMBER 2004 – REVISED NOVEMBER 2013
Ultra-Configurable Multiple-Function Gate With 3-State Output
Check for Samples: SN74LVC1G99
FEATURES
1
•2 Available in Texas Instruments
NanoFree™ Package
• Supports 5-V V_CC Operation
• Inputs Accept Voltages to 5.5 V
• Supports Down Translation to V_CC
• Max t_pd of 6.7 ns at 3.3 V
• Low Power Consumption, 10-µA Max I_CC
• ±24-mA Output Drive at 3.3 V
• Offers Nine Different Logic Functions in a
Single Package
• I_off Supports Live Insertion, Partial-Power-
Down Mode, and Back-Drive Protection
• Input Hysteresis Allows for Slow Input
Transition Time and Better Noise Immunity at
Input
• Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
• ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
DESCRIPTION
The SN74LVC1G99 device is operational from 1.65 V
to 5.5 V.
The SN74LVC1G99 device features configurable
multiple functions with a 3-state output. The output is
disabled when the output-enable (OE) input is high.
When OE is low, the output state is determined by 16
patterns of 4-bit input. The user can choose logic
functions, such as MUX, AND, OR, NAND, NOR,
XOR, XNOR, inverter, and buffer. All inputs can be
connected to V_CC or GND.
This device functions as an independent inverter, but
because of Schmitt action, it has different input
threshold levels for positive-going (V_T+) and negative-
going (V_T–) signals.
To ensure the high-impedance state during power up
or power down, OE should be tied to V_CC through a
pullup resistor; the minimum value of the resistor is
determined by the current-sinking capability of the
driver.
This device is fully specified for partial-power-down
applications using I_off. The I_off circuitry disables the
outputs, preventing damaging current backflow
through the device when it is powered down.
NanoFree™ package technologies are a major
breakthrough in IC packaging concepts, using the die
as the package.
DCT PACKAGE
(TOP VIEW)
OE
1
A
2
B
3
GND
4
8
V_CC
7
Y
6
D
5
C
DCU PACKAGE
(TOP VIEW)
OE 1
A2
B3
GND 4
8
V_CC
7Y
6D
5C
YZP PACKAGE
(BOTTOM VIEW)
GND 4 5 C
B 36 D
A 27 Y
OE
18
V_CC
See mechanical drawings for dimensions.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoFree is a trademark of Texas Instruments.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2004–2013, Texas Instruments Incorporated