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SN74LVC1G386_15 Datasheet, PDF (1/23 Pages) Texas Instruments – Single 3-Input Positive-XOR Gate
SN74LVC1G386
www.ti.com
SCES439E – APRIL 2003 – REVISED DECEMBER 2013
Single 3-Input Positive-XOR Gate
Check for Samples: SN74LVC1G386
FEATURES
1
•2 Available in the Texas Instruments
NanoStar ™ and NanoFree™
Packages
• Supports 5-V VCC Operation
• Inputs Accept Voltages to 5.5 V
• Supports Down Translation to VCC
• Ioff Supports Live Insertion, Partial-Power-
Down Mode, Back-Drive Protection
• Latch-Up Performance Exceeds 100 mA
Per JESD 78, Class II
• ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
DESCRIPTION
The SN74LVC1G386 device performs the Boolean
function Y = A × B × C in positive logic.
NanoStar™ and NanoFree™ package technology is
a major breakthrough in IC packaging concepts,
using the die as the package.
This device is fully specified for partial-power-down
applications using Ioff. The Ioff circuitry disables the
outputs, preventing damaging current backflow
through the device when it is powered down.
DBV PACKAGE
(TOP VIEW)
A
1
6
GND
2
5
DCK PACKAGE
(TOP VIEW)
C
A
1
6C
GND
2
5
VCC
VCC
B
3
4Y
YZP PACKAGE
(BOTTOM VIEW)
B 34
GND 2 5
A 16
Y
VCC
C
B
3
4
Y
DRY PACKAGE
(TOP VIEW)
A1
GND 2
B3
6C
5 VCC
4Y
See mechanical drawings for dimensions.
DSF PACKAGE
(TOP VIEW)
A1 6 C
GND 2 5 VCC
B3 4 Y
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar, NanoFree are trademarks of Texas Instruments.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2003–2013, Texas Instruments Incorporated