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SN74LVC1G126_16 Datasheet, PDF (1/30 Pages) Texas Instruments – Single Bus Buffer Gate With 3-State Output
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SN74LVC1G126
SCES224R – APRIL 1999 – REVISED JANUARY 2015
SN74LVC1G126 Single Bus Buffer Gate With 3-State Output
1 Features
•1 Available in the Texas Instruments
NanoFree™ Package
• Supports 5-V VCC Operation
• Inputs Accept Voltages to 5.5 V
• Provides Down Translation to VCC
• Max tpd of 3.7 ns at 3.3 V
• Low Power Consumption, 10-μA Max ICC
• ±24-mA Output Drive at 3.3 V
• Ioff Supports Live Insertion, Partial-Power-Down
Mode, and Back Drive Protection
• Latch-Up Performance Exceeds 100 mA
Per JESD 78, Class II
• ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model
– 200-V Machine Model
– 1000-V Charged-Device Model
2 Applications
• Cable Modem Termination Systems
• High-Speed Data Acquisition and Generation
• Military: Radars and Sonars
• Motor Controls: High-Voltage
• Power Line Communication Modems
• SSDs: Internal or External
• Video Broadcasting and Infrastructure: Scalable
Platforms
• Video Broadcasting: IP-Based Multi-Format
Transcoders
• Video Communication Systems
3 Description
This single buffer is designed for 1.65-V to 3.6-V VCC
operation. The LVC1G126 device is a single line
driver with 3-state output. The output is disabled
when the output-enable input is low.
Device Information(1)
PART NUMBER PACKAGE (PIN)
BODY SIZE
SOT-23 (5)
2.90 mm × 1.60 mm
SC70 (5)
2.00 mm × 1.25 mm
SN74LVC1G126
SOT (5)
1.60 mm × 1.20 mm
SON (6)
1.00 mm × 1.00 mm
XBGA (5)
1.40 mm × 0.90 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
4 Simplified Schematic
1
OE
2
A
4
Y
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.