SN74LV4040A-EP Datasheet, PDF (1/12 Pages) Texas Instruments – 12 BIT ASYNCHRONOUS BINARY COUNTERS

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SN74LV4040A-EP
12 BIT ASYNCHRONOUS BINARY COUNTERS
SGDS030 – SEPTEMBER 2007
FEATURES
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• Controlled Baseline
– One Assembly
– Test Site
– One Fabrication Site
• Extended Temperature Performance of –55°C
to 125°C
• Enhanced Diminishing Manufacturing Sources
(DMS) Support
• Enhanced Product-Change Notification
• Qualification Pedigree ⁽¹⁾
• 2-V to 5.5-V V_CC Operation
• Typical V_OLP (Output Ground Bounce)
<0.8 V at V_CC = 3.3 V, T_A = 25°C
• Typical V_OHV (Output V_OH Undershoot)
>2.3 V at V_CC = 3.3 V, T_A = 25°C
• Support Mixed-Mode Voltage Operation on All
Ports
• High On-Off Output-Voltage Ratio
• Low Crosstalk Between Switches
• Individual Switch Controls
• Extremely Low Input Current
(1) Component qualification in accordance with JEDEC and
industry standards to ensure reliable operation over an
extended temperature range. This includes, but is not limited
to, Highly Accelerated Stress Test (HAST) or biased 85/85,
temperature cycle, autoclave or unbiased HAST,
electromigration, bond intermetallic life, and mold compound
life. Such qualification testing should not be viewed as
justifying use of this component beyond specified
performance and environmental limits.
• I_off Supports Partial-Power-Down Mode
Operation
• Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
• ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
xxx
SN74LV4040A . . . PW PACKAGE
(TOP VIEW)
Q_L 1
Q_F 2
Q_E 3
Q_G 4
Q_D 5
Q_C 6
Q_B 7
GND 8
16 V_CC
15 Q_K
14 Q_J
13 Q_H
12 Q_I
11 CLR
10 CLK
9 Q_A
DESCRIPTION/ORDERING INFORMATION
The SN74LV4040A device is a 12 bit asynchronous binary counter with the outputs of all stages available
externally. A high level at the clear (CLR) input asynchronously clears the counter and resets all outputs low. The
count is advanced on a high-to-low transition at the clock (CLK) input. Applications include time-delay circuits,
counter controls, and frequency-dividing circuits.
This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs,
preventing damaging current backflow through the devices when they are powered down.
T_A
–55°C to 125°C
TSSOP – PW
ORDERING INFORMATION⁽¹⁾
PACKAGE ⁽²⁾
ORDERABLE PART NUMBER
TOP-SIDE MARKING
Reel of 2000
SN74LV4040AMPWREP
LW040A
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
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Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2007, Texas Instruments Incorporated