SN74LV32A-EP Datasheet, PDF (1/12 Pages) Texas Instruments – QUADRUPLE 2-INPUT POSITIVE-OR GATE

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FEATURES
• Controlled Baseline
– One Assembly/Test Site, One Fabrication
Site
• Extended Temperature Performance of –55°C
to 125°C
• Enhanced Diminishing Manufacturing
Sources (DMS) Support
• Enhanced Product-Change Notification
• Qualification Pedigree ⁽¹⁾
• 2-V to 5.5-V V_CC Operation
• Max t_pd of 7.5 ns at 5 V
• Typical V_OLP (Output Ground Bounce)
<0.8 V at V_CC = 3.3 V, T_A = 25°C
• Typical V_OHV (Output V_OH Undershoot)
>2.3 V at V_CC = 3.3 V, T_A = 25°C
(1) Component qualification in accordance with JEDEC and
industry standards to ensure reliable operation over an
extended temperature range. This includes, but is not limited
to, Highly Accelerated Stress Test (HAST) or biased 85/85,
temperature cycle, autoclave or unbiased HAST,
electromigration, bond intermetallic life, and mold compound
life. Such qualification testing should not be viewed as
justifying use of this component beyond specified
performance and environmental limits.
SN74LV32A-EP
QUADRUPLE 2-INPUT POSITIVE-OR GATE
SCLS565B – JANUARY 2004 – REVISED JANUARY 2006
• Supports Mixed-Mode Voltage Operation on
All Ports
• I_off Supports Partial-Power-Down Mode
Operation
PW PACKAGE
(TOP VIEW)
1A 1
1B 2
1Y 3
2A 4
2B 5
2Y ⁶
GND ⁷
14 V_CC
13 4B
12 4A
11 4Y
10 3B
9 _3A
8 _3Y
DESCRIPTION/ORDERING INFORMATION
This quadruple 2-input positive-OR gate is designed for 2-V to 5.5-V V_CC operation
The SN74LV32A-EP performs the Boolean function ^{Y + A ) B or Y + A • B} in positive logic.
This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
T_A
–40°C to 105°C
–55°C to 125°C
ORDERING INFORMATION
PACKAGE ⁽¹⁾
TSSOP – PW
Tape and reel
TSSOP – PW
Tape and reel
ORDERABLE PART NUMBER
SN74LV32ATPWREP
SN74LV32AMPWREP
TOP-SIDE MARKING
LV32AEP
LV32AEP
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
FUNCTION TABLE
(EACH GATE)
INPUTS
A
B
H
X
X
H
L
L
OUTPUT
Y
H
H
L
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2004–2006, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are
tested unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.