SN74LV221A-Q1 Datasheet, PDF (1/14 Pages) Texas Instruments – DUAL MONOSTABLE MULTIVIBRATOR WITH SCHMITT-TRIGGER INPUTS

SN74LV221A-Q1
www.ti.com
SCLS692A – OCTOBER 2005 – REVISED APRIL 2008
DUAL MONOSTABLE MULTIVIBRATOR
WITH SCHMITT-TRIGGER INPUTS
Check for Samples: SN74LV221A-Q1
FEATURES
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• Qualified for Automotive Applications
• 2-V to 5.5-V V_CC Operation
• Supports Mixed-Mode Voltage Operation on
All Ports
• Schmitt-Trigger Circuitry on A, B, and CLR
Inputs for Slow Transition Rates
• Overriding Clear Terminates Output Pulse
• Glitch-Free Power-Up Reset on Outputs
• I_off Supports Partial-Power-Down Mode
Operation
PW PACKAGE
(TOP VIEW)
1A 1
1B 2
1CLR 3
1Q 4
2Q 5
2C_ext 6
2R_ext/C_ext 7
GND 8
16 VCC
15 1R_ext/C_ext
14 1C_ext
13 1Q
12 2Q
11 2CLR
10 2B
9 2A
DESCRIPTION/ORDERING INFORMATION
The SN74LV221A is a dual multivibrator designed for 2-V to 5.5-V V_CC operation. Each multivibrator has a
negative-transition-triggered (A) input and a positive-transition-triggered (B) input, either of which can be used as
an inhibit input.
This edge-triggered multivibrator features output pulse-duration control by three methods. In the first method, the
A input is low and the B input goes high. In the second method, the B input is high and the A input goes low. In
the third method, the A input is low, the B input is high, and the clear (CLR) input goes high.
The output pulse duration is programmable by selecting external resistance and capacitance values. The
external timing capacitor must be connected between C_ext and R_ext/C_ext(positive) and an external resistor
connected between R_ext/C_ext and V_CC. To obtain variable pulse durations, connect an external variable resistor
between R_ext/C_ext and V_CC. The output pulse duration also can be reduced by taking CLR low.
Pulse triggering occurs at a particular voltage level and is not related directly to the transition time of the input
pulse. The A, B, and CLR inputs have Schmitt triggers with sufficient hysteresis to handle slow input transition
rates with jitter-free triggering at the outputs.
Once triggered, the outputs are independent of further transitions of the A and B inputs and are a function of the
timing components, or the output pulses can be terminated by the overriding clear. Input pulses can be of any
duration relative to the output pulse. Output pulse duration can be varied by choosing the appropriate timing
components. Output rise and fall times are TTL compatible and independent of pulse duration. Typical triggering
and clearing sequences are illustrated in the input/output timing diagram.
The variance in output pulse duration from device to device typically is less than ±0.5% for given external timing
components. An example of this distribution for the SN74LV221A-Q1 is shown in Figure 8. Variations in output
pulse duration versus supply voltage and temperature are shown in Figure 5.
During power up, Q outputs are in the low state, and Q outputs are in the high state. The outputs are glitch free,
without applying a reset pulse.
This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs,
preventing damaging current backflow through the devices when they are powered down.
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