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SN74LV14A-EP Datasheet, PDF (1/15 Pages) Texas Instruments – HEX SCHMITT-TRIGGER INVERTER
www.ti.com
FEATURES
• Controlled Baseline
– One Assembly/Test Site, One Fabrication
Site
• Extended Temperature Performance of –55°C
to 125°C
• Enhanced Diminishing Manufacturing
Sources (DMS) Support
• Enhanced Product-Change Notification
• Qualification Pedigree (1)
• Typical VOLP (Output Ground Bounce)
<0.8 V at VCC = 3.3 V, TA = 25°C
• Typical VOHV (Output VOH Undershoot)
>2.3 V at VCC = 3.3 V, TA = 25°C
• Supports Mixed-Mode Voltage Operation on
All Ports
• Ioff Supports Partial-Power-Down Mode
Operation
(1) Component qualification in accordance with JEDEC and
industry standards to ensure reliable operation over an
extended temperature range. This includes, but is not limited
to, Highly Accelerated Stress Test (HAST) or biased 85/85,
temperature cycle, autoclave or unbiased HAST,
electromigration, bond intermetallic life, and mold compound
life. Such qualification testing should not be viewed as
justifying use of this component beyond specified
performance and environmental limits.
SN74LV14A-EP
HEX SCHMITT-TRIGGER INVERTER
SCLS499C – MAY 2003 – REVISED JUNE 2006
• ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
D OR PW PACKAGE
(TOP VIEW)
1A 1
1Y 2
2A 3
2Y 4
3A 5
3Y 6
GND 7
14 VCC
13 6A
12 6Y
11 5A
10 5Y
9 4A
8 4Y
DESCRIPTION/ORDERING INFORMATION
This hex Schmitt-trigger inverter is designed for 2-V to 5.5-V VCC operation.
The SN74LV14A contains six independent inverters. This device performs the Boolean function Y = A.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
TA
–40°C to 105°C
–55°C to 125°C
ORDERING INFORMATION
PACKAGE (1)
ORDERABLE PART NUMBER
TSSOP – PW
Tape and reel
SN74LV14ATPWREP
SOIC – D
Tape and reel
SN74LV14AMDREP
TSSOP – PW
Tape and reel
SN74LV14AMPWREP
TOP-SIDE MARKING
LV14AEP
LV14AEP
LV14AEP
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
FUNCTION TABLE
(each inverter)
INPUT
A
H
L
OUTPUT
Y
L
H
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2003–2006, Texas Instruments Incorporated