SN74LS292_16 Datasheet, PDF (1/19 Pages) Texas Instruments – Programmable Frequency Dividers

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SN74LS292, SN74LS294
SDLS153A – JANUARY 1981 – REVISED JANUARY 2016
SN74LS29x Programmable Frequency Dividers and Digital Timers
1 Features
•1 Count Divider Chain
• Digitally Programmable from 2² to 2ⁿ
(n = 31 for SN74LS292 , n = 15 for SN74LS294)
• Useable Frequency Range from DC to 30 MHz
• Easily Expandable
2 Applications
• Frequency Division
• Digital Timing
3 Description
The SN74LS29x devices are programmable
frequency dividers and digital timers contain 31 flip-
flops plus 30 gates (in SN74LS292) or 15 flip-flops
plus 29 gates (in SN74LS294) on a single chip. The
count modulo is under digital control of the inputs
provided.
Both types feature an active-low CLR clear input to
initialize the state of all flip-flops. To facilitate the
incoming inspection, test points are provided (TP1,
TP2, and TP3 on the SN74LS292, and TP on the
SN74LS294). These test points are not intended to
drive system loads. Both types feature two clock
inputs; either one may be used for clock gating (see
Table 1).
A brief look at the digital timing capabilities of the
SN74LS292 shows that with a 1-MHz input
frequency, programming for 2¹⁰ gives a period of
1.024 ms, 2²⁰ gives a period of 1.05 sec, 2²⁶ gives a
period of 1.12 min, and 2³¹ gives a period of 35.79
min.
These devices are easily cascadable, giving limitless
possibilities to achievable timing delays.
Device Information⁽¹⁾
PART NUMBER
PACKAGE
BODY SIZE (NOM)
SN74LS292N
SN74LS294N
PDIP (16)
6.35 mm × 19.30 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Logic Symbols
'LS292
CLR
11
R
é
êë
f_i
2ⁿ
ù
úû
CLK1 ⁴
1
CLK2 ⁵
n=0
f_i
n=1
3
TP1
6
TP2
13
TP3
A ¹⁰ ₀
B
1
C
D
E
15
14
2
4
éënùû
0
31
é
êë^fo
f_i
2ⁿ
ù
úû
7
Q
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.