SN74CBT3305C_15 Datasheet, PDF (1/16 Pages) Texas Instruments – DUAL FET BUS SWITCH 5-V BUS SWITCH WITH –2-V UNDERSHOOT PROTECTION

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SN74CBT3305C
DUAL FET BUS SWITCH
5-V BUS SWITCH WITH –2-V UNDERSHOOT PROTECTION
SCDS125B – SEPTEMBER 2003 – REVISED AUGUST 2005
FEATURES
• Undershoot Protection for OFF Isolation on A
and B Ports up to –2 V
• Bidirectional Data Flow With Near-Zero
Propagation Delay
• Low ON-State Resistance (r_on) Characteristics
(r_on = 3 Ω Typ)
• Low Input/Output Capacitance Minimizes
Loading and Signal Distortion
(C_io(OFF) = 5 pF Typ)
• Data and Control Inputs Provide Undershoot
Clamp Diodes
• Low Power Consumption
(I_CC = 3 µA Max)
• V_CC Operating Range From 4 V to 5.5 V
• Data I/Os Support 0- to 5-V Signaling Levels
(0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V, 5 V)
• Control Inputs Can Be Driven by TTL or
5-V/3.3-V CMOS Outputs
• I_off Supports Partial-Power-Down Mode
Operation
• Latch-Up Performance Exceeds 100 mA Per
JESD 78, ClassII
• ESD Performance Tested Per JESD 22
– 2000-V Human-Body Model
(A114-B, Class II)
– 1000-V Charged-Device Model (C101)
• Supports Both Digital and Analog
Applications: USB Interface, Bus Isolation,
Low-Distortion Signal Gating
xxx
xxx
D, DGK, OR PW PACKAGE
(TOP VIEW)
1OE 1
1A 2
1B 3
GND 4
8 V_CC
7 2OE
6 2B
5 2A
DESCRIPTION/ORDERING INFORMATION
The SN74CBT3305C is a high-speed TTL-compatible FET bus switch with low ON-state resistance (r_on), allowing
for minimal propagation delay. Active undershoot-protection circuitry on the A and B ports of the device provides
protection for undershoot up to –2 V by sensing an undershoot event and ensuring that the switch remains in the
proper OFF state.
The SN74CBT3305C is organized as two 1-bit bus switches with separate output-enable (1OE, 2OE) inputs. It
can be used as two 1-bit bus switches or as one 2-bit bus switch. When OE is high, the associated 1-bit bus
switch is ON, and the A port is conncected to the B port, allowing bidirectional data flow between ports. When
OE is low, the associated 1-bit bus switch is OFF, and the high-impedance state exists between the A and B
ports.
T_A
–40°C to 85°C
ORDERING INFORMATION
PACKAGE ⁽¹⁾
ORDERABLE PART NUMBER
TOP-SIDE MARKING
SOIC – D
Tube
Tape and reel
SN74CBT3305CD
SN74CBT3305CDR
CU305C
VSSOP – DGK
Tape and reel
SN74CBT3305CDGKR
SNR
TSSOP – PW
Tube
Tape and reel
SN74CBT3305CPW
SN74CBT3305CPWR
CU305C
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2003–2005, Texas Instruments Incorporated