SN74AVCH4T245_15 Datasheet, PDF (1/37 Pages) Texas Instruments – 4-Bit Dual-Supply Bus Transceiver

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SN74AVCH4T245
SCES577E – JUNE 2004 – REVISED NOVEMBER 2015
SN74AVCH4T245 4-Bit Dual-Supply Bus Transceiver
With Configurable Level-Shifting, Voltage Translation, and 3-State Outputs
1 Features
•1 Control Inputs V_IH/V_IL Levels are Referenced to
V_CCA Voltage
• Fully Configurable Dual-Rail Design Allows Each
Port to Operate Over the Full 1.2V to 3.6V Power-
Supply Range
• I/Os Are 4.6V Tolerant
• I_off Supports Partial Power-Down-Mode Operation
• Bus Hold on Data Inputs Eliminates the Need for
External pull-up/pull-down Resistors
• Max Data Rates
– 380 Mbps (1.8 V to 3.3 V Translation)
– 200 Mbps (<1.8 V to 3.3 V Translation)
– 200 Mbps (Translate to 2.5 V or 1.8 V)
– 150 Mbps (Translate to 1.5 V)
– 100 Mbps (Translate to 1.2 V)
• Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
• ESD Protection Exceeds JESD 22
– 8000 V Human Body Model (A114-A)
– 200 V Machine Model (A115-A)
– 1000 V Charged-Device Model (C101)
2 Applications
• Personal Electronics
• Industrial
• Enterprise
• Telecom
Logic Diagram (Positive Logic) for 1/2 of
AVCH4T245
DIR
OE
A1
3 Description
This 4-bit noninverting bus transceiver uses two
separate configurable power-supply rails. The A port
is designed to track V_CCA. V_CCA accepts any supply
voltage from 1.2 V to 3.6 V. The B port is designed to
track V_CCB. V_CCB accepts any supply voltage from 1.2
V to 3.6 V. The SN74AVCH4T245 is optimized to
operate with V_CCA/V_CCB set at 1.4 V to 3.6 V. It is
operational with V_CCA/V_CCB as low as 1.2 V. This
allows for universal low voltage bidirectional
translation between any of the 1.2V, 1.5V, 1.8V, 2.5V,
and 3.3V voltage nodes.
The SN74AVCH4T245 is designed for asynchronous
communication between two data buses. The logic
levels of the direction-control (DIR) input and the
output-enable (OE) input activate either the B-port
outputs or the A-port outputs or place both output
ports into the high-impedance mode. The device
transmits data from the A bus to the B bus when the
B-port outputs are activated, and from the B bus to
the A bus when the A-port outputs are activated. The
input circuitry on both A and B ports is always active
and must have a logic HIGH or LOW level applied to
prevent excess I_CC and I_CCZ.
The SN74AVCH4T245 device control pins (1DIR,
2DIR, 1OE, and 2OE) are supplied by V_CCA.
This device is fully specified for partial-power-down
applications using I_off. The I_off circuitry disables the
outputs, preventing damaging current backflow
through the device when it is powered down.
Device Information⁽¹⁾
PART NUMBER
PACKAGE
BODY SIZE (NOM)
UQFN (16)
1.80 mm × 2.60 mm
VQFN (16)
3.50 mm × 4.00 mm
SN74AVCH4T245 TVSOP (16)
4.40 mm × 3.60 mm
TSSOP (16)
4.40 mm × 5.00 mm
SOIC (16)
3.91 mm × 9.90 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
B1
A2
B2
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.