SN74AVCH2T45_15 Datasheet, PDF (1/31 Pages) Texas Instruments – 2-Supply, Bus Transceiver with Configurable Level-Shifting

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SN74AVCH2T45
SCES582H – JULY 2004 – REVISED APRIL 2015
SN74AVCH2T45 2-Bit, 2-Supply, Bus Transceiver with Configurable Level-Shifting and
Translation and 3-State Outputs
1 Features
•1 Available in the Texas Instruments NanoFree™
Package
• V_CC Isolation
• 2-Rail Design
• I/Os are 4.6 V Tolerant
• Partial Power-Down-Mode Operation
• Bus Hold on Data Inputs
• Maximum Data Rates
– 500 Mbps (1.8 V to 3.3 V)
– 320 Mbps (< 1.8 V to 3.3 V)
– 320 Mbps (Level-Shifting to 2.5 V or 1.8 V)
– 280 Mbps (Level-Shifting to 1.5 V)
– 240 Mbps (Level-Shifting to 1.2 V)
• Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
• ESD Protection Exceeds JESD 22
2 Applications
• Smartphone
• Servers
• Desktop PCs and Notebooks
• Other Portable Devices
3 Description
This 2-bit non-inverting bus transceiver uses two
separate configurable power-supply rails. The A ports
are designed to track V_CCA and accepts any supply
voltage from 1.2 V to 3.6 V. The B ports are designed
to track V_CCB and accepts any supply voltage from
1.2 V to 3.6 V. This allows for universal low-voltage
bidirectional translation and level-shifting between
any of the 1.2 V, 1.5 V, 1.8 V, 2.5 V, and 3.3 V
voltage nodes.
The SN74AVCH2T45 is designed for asynchronous
communication between two data buses. The logic
levels of the direction-control (DIR pin) input activate
either the B-port outputs or the A-port outputs. The
device transmits data from the A bus to the B bus
when the B-port outputs are activated and from the B
bus to the A bus when the A-port outputs are
activated. The SN74AVCH2T45 features active bus-
hold circuitry, which holds unused or un-driven inputs
at a valid logic state. TI does not recommend using
pull-up or pull-down resistors with the bus-hold
circuitry.
Device Information⁽¹⁾
PART NUMBER
PACKAGE
BODY SIZE (NOM)
SSOP (8)
2.95 mm × 2.80 mm
SN74AVCH2T45 VSSOP (8)
2.30 mm × 2.00 mm
DSBGA (8)
1.89 mm × 0.89 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
V_CCA
1
VCCA
Logic Diagram (Positive Logic)
V_CCB
8
VCCB
5
DIR
2
A1
7
B1
3
A2
V_CCA
V_CCB
4 GND
6
B2
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.