SN74AVC32T245_15 Datasheet, PDF (1/29 Pages) Texas Instruments – 32-Bit Dual-Supply Bus Transceiver

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SN74AVC32T245
SCES553F – MAY 2004 – REVISED JULY 2015
SN74AVC32T245 32-Bit Dual-Supply Bus Transceiver
With Configurable Voltage Translation, Level-Shifting, and Tri-State Outputs
1 Features
•1 Member of the Texas Instruments Widebus+™
Family
• Control Inputs V_IH/V_IL Levels Referenced to V_CCA
Voltage
• V_CC Isolation Feature – If Either V_CC Input is at
GND, Both Ports are in the High-Impedance State
• Overvoltage-Tolerant Inputs/Outputs Allow Mixed-
Voltage-Mode Data Communications
• Fully Configurable Dual-Rail Design Allows Each
Port to Operate Over Full 1.2 V to 3.6 V Power-
Supply Range
• I_off Supports Partial-Power-Down Mode Operation
• 4.6 V Tolerant I/Os
• Max Data Rates
– 380 Mbps (1.8 V to 3.3 V Level-Shifting)
– 200 Mbps (< 1.8 V to 3.3 V Level-Shifting)
– 200 Mbps (Translate to 2.5 V or 1.8 V)
– 150 Mbps (Translate to 1.5 V)
– 100 Mbps (Translate to 1.2 V)
• Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
• ESD Protection Exceeds JESD 22
– 4000 V Human-Body Model (A114-A)
– 200 V Machine Model (A115-A)
– 1000 V Charged-Device Model (C101)
2 Applications
• Personal Electronics
• Industrial
• Enterprise
• Telecom
3 Description
This 32-bit noninverting bus transceiver uses two
separate, configurable power-supply rails. The
SN74AVC32T245 device is optimized to operate with
V_CCA/V_CCB set from 1.4 V to 3.6 V. It is operational
with V_CCA/V_CCB as low as 1.2 V. The A port is
designed to track V_CCA. V_CCA and accepts any supply
voltage from 1.2 V to 3.6 V. The B port is designed to
track V_CCB. V_CCB and accepts any supply voltage from
1.2 V to 3.6 V. This allows for universal low-voltage
bidirectional translation between any of the 1.2 V,
1.5V, 1.8 V, 2.5 V, and 3.3 V voltage nodes.
The SN74AVC32T245 is designed for asynchronous
communication between data buses. The device
transmits data from the A bus to the B bus or from
the B bus to the A bus, depending on the logic level
at the direction-control (DIR) input. The output-enable
(OE) input can disable the outputs so the buses are
effectively isolated.
The SN74AVC32T245 is designed so that the control
pins (1DIR, 2DIR, 3DIR, 4DIR, 1OE, 2OE, 3OE, and
4OE) are supplied by V_CCA.
This device is fully specified for partial-power-down
applications using I_off. The I_off circuitry disables the
outputs, preventing damaging current backflow
through the device when it is powered down.
The V_CC isolation feature ensures that if either V_CC
input is at GND, then both ports are in the high-
impedance state.
To ensure the high-impedance state during power up
or power down, OE should be tied to V_CC through a
pullup resistor; the minimum value of the resistor is
determined by the current-sinking capability of the
driver.
Device Information⁽¹⁾
PART NUMBER
PACKAGE
BODY SIZE (NOM)
SN74AVC32T245
LFBGA (96)
BGA MICROSTAR
JUNIOR (96)
13.50 mm × 5.50 mm
8.50 mm × 3.50 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Logic Diagram
A3
1DIR
A5
1A1
A4
1OE
A2
1B1
H3
2DIR
E5
2A1
H4
2OE
E2
2B1
3DIR ^J3
J5
3A1
To Seven Other Channels
J4 _3OE
J2
3B1
To Seven Other Channels
4DIR ^T3
N5
4A1
T4 _4OE
N2
4B1
To Seven Other Channels
To Seven Other Channels
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.