SN74AVC16373_15 Datasheet, PDF (1/19 Pages) Texas Instruments – 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS

SN74AVC16373
www.ti.com ..................................................................................................................................... SCES156H – DECEMBER 1998 – REVISED SEPTEMBER 2008
16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS
FEATURES
1
•2 Member of the Texas Instruments Widebus™
Family
• EPIC™ (Enhanced-Performance Implanted
CMOS) Submicron Process
• DOC™ (Dynamic Output Control) Circuit
Dynamically Changes Output Impedance,
Resulting in Noise Reduction Without Speed
Degradation
• Dynamic Drive Capability Is Equivalent to
Standard Outputs With I_OH and I_OL of ±24 mA at
2.5-V V_CC
• Overvoltage-Tolerant Inputs/Outputs Allow
Mixed-Voltage-Mode Data Communications
• I_off Supports Partial-Power-Down Mode
Operation
• ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
• Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
• Package Options Include Plastic Thin Shrink
Small-Outline (DGG) and Thin Very
Small-Outline (DGV) Packages
DESCRIPTION
A Dynamic Output Control (DOC™) circuit is implemented, which, during the transition, initially lowers the output
impedance to effectively drive the load and, subsequently, raises the impedance to reduce noise. Figure 1 shows
typical V_OL vs I_OL and V_OH vs I_OH curves to illustrate the output impedance and drive capability of the circuit. At
the beginning of the signal transition, the DOC circuit provides a maximum dynamic drive that is equivalent to a
high-drive standard-output device. For more information, refer to the TI application reports, AVC Logic Family
Technology and Applications, literature number SCEA006, and Dynamic Output Control (DOC™) Circuitry
Technology and Applications, literature number SCEA009.
3.2 _{TA = 25°C}
2.8 ^{Process = Nominal}
T_A = 25°C
2.8 Process = Nominal
2.4
2.4
2.0
V_CC = 3.3 V
2.0
1.6
V_CC = 2.5 V
1.2
V_CC = 1.8 V
0.8
0.4
0 17 34 51 68 85 102 119 136 153 170
I_OL - Output Current - mA
1.6
1.2
0.8
V_CC = 3.3 V
0.4
V_CC = 2.5 V
V_CC = 1.8 V
-160 -144 -128 -112 -96 -80 -64 -48 -32 -16 0
I_OH - Output Current - mA
Figure 1. Output Voltage vs Output Current
This 16-bit transparent D-type latch is operational at 1.2-V to 3.6-V V_CC, but is designed specifically for 1.65-V to
3.6-V V_CC operation.
The SN74AVC16373 is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers,
and working registers. This device can be used as two 8-bit latches or one 16-bit latch. When the latch-enable
(LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at
the levels set up at the D inputs.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus, EPIC, DOC are trademarks of Texas Instruments.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1998–2008, Texas Instruments Incorporated