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SN74AUP2G00-Q1 Datasheet, PDF (1/14 Pages) Texas Instruments – LOW-POWER DUAL 2-INPUT POSITIVE-NAND GATE
SN74AUP2G00-Q1
www.ti.com
LOW-POWER DUAL 2-INPUT POSITIVE-NAND GATE
Check for Samples: SN74AUP2G00-Q1
SCES812 – JUNE 2010
FEATURES
1
• Qualified for Automotive Applications
• Low Static-Power Consumption
(ICC = 1.7 mA Maximum)
• Low Dynamic-Power Consumption
(Cpd = 4.3 pF Typ at 3.3 V)
• Low Input Capacitance (Ci = 1.5 pF Typical)
• Low Noise – Overshoot and Undershoot
<10% of VCC
• Ioff Supports Partial-Power-Down Mode
Operation
• Wide Operating VCC Range of 0.8 V to 3.6 V
• Optimized for 3.3-V Operation
• 3.6-V I/O Tolerant to Support Mixed-Mode
Signal Operation
• tpd = 5.9 ns Maximum at 3.3 V
• Suitable for Point-to-Point Applications
• Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
1A
1B
2Y
GND
DCU PACKAGE
(TOP VIEW)
1
8
2
7
3
6
4
5
VCC
1Y
2B
2A
See mechanical drawings for dimensions.
DESCRIPTION/ORDERING INFORMATION
The AUP family is TI's premier solution to the industry's low-power needs in battery-powered portable
applications. This family ensures a very low static- and dynamic-power consumption across the entire VCC range
of 0.8 V to 3.6 V, resulting in increased battery life (see Figure 1). This product also maintains excellent signal
integrity (see the very low undershoot and overshoot characteristics shown in Figure 2).
Static-Power Consumption
Dynamic-Power Consumption
(µA)
(pF)
100%
100%
3.5
Switching Characteristics
at 25 MHz(A)
80%
60%
40%
20%
3.3-V
Logic(A)
80%
60%
40%
20%
3.3-V
Logic(A)
3.0
2.5
2.0 Input
1.5
1.0
0.5
Output
0%
AAUUPP
0%
AUP
(A)
Single, dual, and triple gates
0.0
-0.5
0
5 10 15 20 25 30 35 40 45
Time (ns)
Figure 1. AUP – The Lowest-Power Family
(A) SN74AUP2Gxx data at CL = 15 pF.
Figure 2. Excellent Signal Integrity
The SN74AUP2G00 performs the Boolean function Y = A • B or Y = A + B in positive logic.
NanoStar™ package technology is a major breakthrough in IC packaging concepts, using the die as the
package.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2010, Texas Instruments Incorporated