SN74AUP1T17_15 Datasheet, PDF (1/18 Pages) Texas Instruments – 3.3-V CMOS Output Single Schmitt-Trigger Buffer Gate

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SN74AUP1T17
SCES803A – APRIL 2010 – REVISED JUNE 2015
SN74AUP1T17 Low Power, 1.8/2.5/3.3-V Input, 3.3-V CMOS Output,
Single Schmitt-Trigger Buffer Gate
1 Features
•1 Single-Supply Voltage Translator
• Output Level Up to Supply V_CC CMOS Level
– 1.8 V to 3.3 V (at V_CC = 3.3 V)
– 2.5 V to 3.3 V (at V_CC = 3.3 V)
– 1.8 V to 2.5 V (at V_CC = 2.5 V)
– 3.3 V to 2.5 V (at V_CC = 2.5 V
• Schmitt-Trigger Inputs Reject Input Noise and
Provide Better Output Signal Integrity
• I_off Supports Partial Power Down (V_CC = 0 V)
• Very Low Static Power Consumption:
0.1 µA
• Very Low Dynamic Power Consumption:
0.9 µA
• Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
• Pb-Free Packages Available: SC-70 (DCK)
2 x 2.1 x 0.65 mm (Height 1.1 mm)
• More Gate Options Available at
www.ti.com/littlelogic
• ESD Performance Tested Per JESD 22
– 2000-V Human Body Model
(A114-B, Class II)
– 1000-V Charged-Device Model (C101)
2 Applications
• AV Receivers
• Audio Dock: Portable
• Blu-ray Players and Home Theaters
• MP3 Players and Recorders
• Personal Digital Assistant (PDA)
• Power: Telecom/Server AC/DC Supply: Single
Controller: Analog and Digital
• Solid State Drive (SSD): Client and Enterprise
• TV: LCD/Digital and High-Definition (HDTV)
• Tablet: Enterprise
• Video Analytics: Servers
• Wireless Headsets, Keyboards, and Mice
3 Description
The SN74AUP1T17 performs the Boolean function
Y = A with designation for logic-level translation
applications with output referenced to supply V_CC.
AUP technology is the industry's lowest-power logic
technology designed for use in extending battery-life
in operating. All input levels that accept 1.8-V
LVCMOS signals, while operating from either a single
3.3-V or 2.5-V V_CC supply. This product also
maintains excellent signal integrity (see Figure 4 and
Figure 1).
The wide V_CC range of 2.3 V to 3.6 V allows the
possibility of switching output level to connect to
external controllers or processors.
Schmitt-trigger inputs (ΔV_T = 210 mV between
positive and negative input transitions) offer improved
noise immunity during switching transitions, which is
especially useful on analog mixed-mode designs.
Schmitt-trigger inputs reject input noise, ensure
integrity of output signals, and allow for slow input
signal transition.
I_off is a feature that allows for powered-down
conditions (V_CC = 0 V) and is important in portable
and mobile applications. When V_CC = 0 V, signals in
the range from 0 V to 3.6 V can be applied to the
inputs and outputs of the device. No damage occurs
to the device under these conditions.
The SN74AUP1T17 is designed with optimized
current-drive capability of 4 mA to reduce line
reflections, overshoot, and undershoot caused by
high-drive outputs.
Device Information⁽¹⁾
PART NUMBER
PACKAGE
BODY SIZE (NOM)
SN74AUP1T17DCK SC70 (5)
2.00 mm x 1.25 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Simplified Schematic
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.