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SN74AS131A Datasheet, PDF (1/6 Pages) Texas Instruments – 3-LINE TO 8-LINE DECODER/DEMULTIPLEXER WITH ADDRESS REGISTERS
SN74AS131A
3ĆLINE TO 8ĆLINE DECODER/DEMULTIPLEXER
WITH ADDRESS REGISTERS
SDAS060C − APRIL 1982 − REVISED DECEMBER 1994
• Combines Decoder and 3-Bit Address
Register
D OR N PACKAGE
(TOP VIEW)
• Incorporates Two Enable Inputs to Simplify
Cascading
• Package Options Include Plastic
Small-Outline (D) Packages and Standard
Plastic (N) 300-mil DIPs
A1
B2
C3
CLK 4
G2 5
16 VCC
15 Y0
14 Y1
13 Y2
12 Y3
description
G1 6
Y7 7
11 Y4
10 Y5
The SN74AS131A is a 3-line to 8-line
GND 8
9 Y6
decoder/demultiplexer with registers on the three
address inputs. When the clock (CLK) input goes
from low to high, the device acts as a decoder/
demultiplexer and the address present at the select (A, B, and C) inputs is stored in the registers. Further
address changes are ignored until the next rising transition of CLK. The output-enable (G1, G2) inputs control
the state of the outputs independently of the select or CLK inputs. All of the outputs are high unless G1 is high
and G2 is low. This device is ideally suited for implementing glitch-free decoders in strobed (stored-address)
applications in bus-oriented systems.
The SN74AS131A is characterized for operation from 0°C to 70°C.
CLK
X
X
↑
↑
↑
↑
↑
↑
↑
↑
L or H
INPUTS
ENABLE
G1 G2
C
X
H
X
L
X
X
H
L
L
H
L
L
H
L
L
H
L
L
H
L
H
H
L
H
H
L
H
H
L
H
H
L
X
SELECT
B
X
X
L
L
H
H
L
L
H
H
X
FUNCTION TABLE
OUTPUTS
A
Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7
X
H
H
H
H
H
H
H
H
X
H
H
H
H
H
H
H
H
L
L
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
L
H
H
L
H
H
H
H
H
H
H
H
H
L
H
H
H
H
L
H
H
H
H
L
H
H
H
H
H
H
H
H
H
L
H
H
L
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
L
X
Outputs corresponding to stored address = L; all others = H.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright  1994, Texas Instruments Incorporated
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1
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