SN74ALVCH16245-EP Datasheet, PDF (1/11 Pages) Texas Instruments – 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS

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FEATURES
• Controlled Baseline
– One Assembly/Test Site, One Fabrication
Site
• Enhanced Diminishing Manufacturing
Sources (DMS) Support
• Enhanced Product-Change Notification
• Qualification Pedigree ⁽¹⁾
• Member of the Texas Instruments Widebus™
Family
• Operates From 1.65 V to 3.6 V
• Max t_pd of 3 ns at 3.3 V
• ±24-mA Output Drive at 3.3 V
• Bus Hold on Data Inputs Eliminates the Need
for External Pullup/Pulldown Resistors
• Latch-Up Performance Exceeds 250 mA Per
JESD 17
• ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
(1) Component qualification in accordance with JEDEC and
industry standards to ensure reliable operation over an
extended temperature range. This includes, but is not limited
to, Highly Accelerated Stress Test (HAST) or biased 85/85,
temperature cycle, autoclave or unbiased HAST,
electromigration, bond intermetallic life, and mold compound
life. Such qualification testing should not be viewed as
justifying use of this component beyond specified
performance and environmental limits.
SN74ALVCH16245-EP
16-BIT BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
SCES608A – SEPTEMBER 2004 – REVISED JUNE 2006
DL PACKAGE
(TOP VIEW)
1DIR ¹
1B1 ²
1B2 ³
GND ⁴
1B3 ⁵
1B4 ⁶
V_CC ⁷
1B5 ⁸
1B6 ⁹
GND ¹⁰
1B7 ¹¹
1B8 ¹²
2B1 ¹³
2B2 ¹⁴
GND ¹⁵
2B3 ¹⁶
2B4 ¹⁷
V_CC ¹⁸
2B5 ¹⁹
2B6 ²⁰
GND ²¹
2B7 ²²
2B8 ²³
2DIR ²⁴
48 _1OE
47 _1A1
46 _1A2
45 _GND
44 _1A3
43 _1A4
42 _VCC
41 _1A5
40 _1A6
39 _GND
38 _1A7
37 _1A8
36 _2A1
35 _2A2
34 _GND
33 _2A3
32 _2A4
31 _VCC
30 _2A5
29 _2A6
28 _GND
27 _2A7
26 _2A8
25 _2OE
DESCRIPTION/ORDERING INFORMATION
This 16-bit (dual-octal) noninverting bus transceiver is designed for 1.65-V to 3.6-V V_CC operation.
The SN74ALVCH16245-EP is designed for asynchronous communication between data buses. The
control-function implementation minimizes external timing requirements.
This device can be used as two 8-bit transceivers or one 16-bit transceiver. It allows data transmission from the
A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR)
input. The output-enable (OE) input can be used to disable the device so that the buses are effectively isolated.
ORDERING INFORMATION
T_A
–40°C to 85°C
–55°C to 125°C
SSOP – DL
SSOP – DL
PACKAGE ⁽¹⁾
Tape and reel
Tape and reel
ORDERABLE PART NUMBER
CALVCH16245IDLREP
CALVCH16245MDLREP
TOP-SIDE MARKING
ALVCH16245
ALCH16245M
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2004–2006, Texas Instruments Incorporated