SN74ALVC10_15 Datasheet, PDF (1/15 Pages) Texas Instruments – TRIPLE 3-INPUT POSITIVE-NAND GATE

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FEATURES
• Operates From 1.65 V to 3.6 V
• Max t_pd of 3 ns at 3.3 V
• ±24-mA Output Drive at 3.3 V
• Latch-Up Performance Exceeds 250 mA Per
JESD 17
• ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
SN74ALVC10
TRIPLE 3-INPUT POSITIVE-NAND GATE
SCES106H – JULY 1997 – REVISED OCTOBER 2004
D, DGV, NS, OR PW PACKAGE
(TOP VIEW)
1A 1
1B 2
2A 3
2B 4
2C 5
2Y 6
GND 7
14 V_CC
13 1C
12 1Y
11 3C
10 3B
9 3A
8 3Y
DESCRIPTION/ORDERING INFORMATION
This triple 3-input positive-NAND gate is designed for 1.65-V to 3.6-V V_CC operation.
The SN74ALVC10 performs the Boolean function Y = A • B • C or Y = A + B + C in positive logic.
T_A
SOIC - D
-40°C to 85°C
SOP - NS
TSSOP - PW
TVSOP - DGV
ORDERING INFORMATION
PACKAGE ⁽¹⁾
ORDERABLE PART NUMBER
Tube
SN74ALVC10D
Tape and reel
SN74ALVC10DR
Tape and reel
SN74ALVC10NSR
Tape and reel
SN74ALVC10PWR
Tape and reel
SN74ALVC10DGVR
TOP-SIDE MARKING
ALVC10
ALVC10
VA10
VA10
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
FUNCTION TABLE
(each gate)
INPUTS
OUTPUT
A
B
C
Y
H
H
H
L
L
X
X
H
X
L
X
H
X
X
L
H
LOGIC DIAGRAM, EACH GATE (POSITIVE LOGIC)
A
B
Y
C
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1997–2004, Texas Instruments Incorporated