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SN74ALS29825 Datasheet, PDF (1/9 Pages) Texas Instruments – 8-BIT BUS INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS
SN54ALS29825, SN74ALS29825, SN74ALS29826
8BIT BUS INTERFACE FLIPFLOPS WITH 3STATE OUTPUTS
SDAS147B — JANUARY 1986 — REVISED MARCH 1990
• Functionally Equivalent to AMD AM29825
and AM29826
• Improved IOH Specifications
• Multiple Output Enables Allow Multiuser
Control of the Interface
• Outputs Have Undershoot Protection
Circuitry
• Power-Up High-Impedance State
• Package Options Include Plastic
“Small-Outline” Packages and Standard
Plastic and Ceramic 300-mil DIPs
• Buffered Control Inputs to Reduce DC
Loading Effect
SN54ALS29825 . . . JT PACKAGE
SN74ALS29825 . . . DW OR NT PACKAGE
(TOP VIEW)
OC1 1
OC2 2
1D 3
2D 4
3D 5
4D 6
5D 7
6D 8
7D 9
8D 10
CLR 11
GND 12
24 VCC
23 OC3
22 1Q
21 2Q
20 3Q
19 4Q
18 5Q
17 6Q
16 7Q
15 8Q
14 CLKEN
13 CLK
description
These 8-bit flip-flops feature three-state outputs
designed specifically for driving highly capacitive
or relatively low-impedance loads. They are
particularly suitable for implementing multiuser
registers, I/O ports, bidirectional bus drivers, and
working registers.
With the clock enable (CLKEN) low, the eight
D-type edge-triggered flip-flops enter data on the
low-to- high transitions of the clock. Taking
CLKEN high will disable the clock buffer, thus
latching the outputs. The ′ALS29825 has
noninverting D inputs and the ′ALS29826 has
inverting D inputs. Taking the CLR input low
causes the eight Q outputs to go low independent-
ly of the clock.
SN74ALS29826 . . . DW OR NT PACKAGE
(TOP VIEW)
OC1 1
OC2 2
1D 3
2D 4
3D 5
4D 6
5D 7
6D 8
7D 9
8D 10
CLR 11
GND 12
24 VCC
23 OC3
22 1Q
21 2Q
20 3Q
19 4Q
18 5Q
17 6Q
16 7Q
15 8Q
14 CLKEN
13 CLK
Multiuser buffered output-control inputs (OC1, OC2, and OC3) can be used to place the eight outputs in either
a normal logic state (high or low level) or a high-impedance state. The outputs are also in the high-impedance
state during power-up and power-down conditions. The outputs remain in the high-impedance state while the
device is powered-down. In the high-impedance state the outputs neither load nor drive the bus lines
significantly. The high-impedance state and increased drive provide the capability to drive the bus lines in a
bus-organized system without need for interface or pullup components. The output controls do not affect the
internal operation of the flip-flops. Old data can be retained or new data can be entered while the outputs are
in the high-impedance state.
The SN54ALS29825 is characterized over the full military range of − 55°C to 125°C. The SN74ALS29825 and
SN74ALS29826 are characterized for operation from 0°C to 70°C.
PRODUCTION DATA information is current as of
publication date. Products conform to specifications
per the terms of Texas Instruments standard
warranty. Production processing does not
necessarily include testing of all parameters.
Copyright  1991, Texas Instruments Incorporated
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
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