SN74AHCT125-Q1 Datasheet, PDF (1/11 Pages) Texas Instruments – QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS

SN74AHCT125-Q1
QUADRUPLE BUS BUFFER GATE
WITH 3-STATE OUTPUTS
SCLS508A − JUNE 2003 − REVISED FEBRUARY 2008
D Qualified for Automotive Applications
D ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
D Inputs Are TTL-Voltage Compatible
description/ordering information
The SN74AHCT125 is a quadruple bus buffer gate
featuring independent line drivers with 3-state
outputs. Each output is disabled when the associated
output-enable (OE) input is high. When OE is low, the
respective gate passes the data from the A input to
its Y output.
D OR PW PACKAGE
(TOP VIEW)
1OE 1
1A 2
1Y 3
2OE 4
2A ⁵
2Y ⁶
GND ⁷
14 VCC
13 4OE
12 4A
11 4Y
10 3OE
9 3A
8 3Y
To ensure the high-impedance state during power up or power down, OE should be tied to V_CC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION^†
T_A
PACKAGE^‡
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
−40°C to 125°C
SOIC − D
TSSOP − PW
Tape and reel
Tape and reel
SN74AHCT125QDRQ1 AHCT125Q
SN74AHCT125QPWRQ1 HB125Q
† _{For the most current package and ordering information, see the Package Option Addendum at the end of this}
document, or see the TI web site at http://www.ti.com.
‡ _{Package drawings, thermal data, and symbolization are available at http://www.ti.com/packaging.}
FUNCTION TABLE
(each buffer)
INPUTS
OE
A
OUTPUT
Y
L
H
H
L
L
L
H
X
Z
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Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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