SN74AHC2G126 Datasheet, PDF (1/6 Pages) Texas Instruments – DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS

D EPIC™ (Enhanced-Performance Implanted
CMOS) Process
D Operating Range 2-V to 5.5-V V_CC
D Packaged in Plastic Small-Outline
Transistor Package
description
SN74AHC2G126
DUAL BUS BUFFER GATE
WITH 3-STATE OUTPUTS
SCLS440A – SEPTEMBER 1999 – REVISED NOVEMBER 1999
DCT PACKAGE
(TOP VIEW)
1OE 1
1A 2
2Y 3
GND 4
8 V_CC
7 2OE
6 1Y
5 2A
The SN74AHC2G126 is a dual bus buffer gate/line driver with 3-state outputs. The outputs are disabled when
the output-enable (OE) input is low. When OE is high, true data is passed from the A input to the Y output.
To ensure the high-impedance state during power up or power down, OE should be tied to GND through a
pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the
driver.
The SN74AHC2G126 is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
(each gate)
INPUTS
OE
A
OUTPUT
Y
H
H
H
H
L
L
L
X
Z
logic symbol^†
1
1OE
2
1A
7
2OE
5
2A
EN ¹
† _{This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.}
6
1Y
3
2Y
logic diagram (positive logic)
1
1OE
2
1A
7
2OE
5
2A
6
1Y
3
2Y
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Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
Copyright © 1999, Texas Instruments Incorporated
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