SN65MLVD047A Datasheet, PDF (1/21 Pages) Texas Instruments – MULTIPOINT-LVDS QUAD DIFFERENTIAL LINE DRIVER

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SN65MLVD047A
SLLS736A − JULY 2006 − REVISED MAY 2008
MULTIPOINT-LVDS QUAD DIFFERENTIAL LINE DRIVER
FEATURES
D Differential Line Drivers for 30-Ω to 55-Ω
Loads and Data Rates⁽¹⁾ Up to 200 Mbps,
Clock Frequencies up to 100 MHz
D Supports Multipoint Bus Architectures
D Meets the Requirements of TIA/EIA-899
D Operates from a Single 3.3-V Supply
D Characterized for Operation from −405C to
855C
D 16-Pin SOIC (JEDEC MS-012) and 16-Pin
TSSOP (JEDEC MS-153) Packaging
APPLICATIONS
D AdvancedTCAE (ATCAE) Clock Bus Driver
D Clock Distribution
D Backplane or Cabled Multipoint Data
Transmission in Telecommunications,
Automotive, Industrial, and Other Computer
Systems
D Cellular Base Stations
D Central-Office and PBX Switching
D Bridges and Routers
D Low-Power High-Speed Short-Reach
Alternative to TIA/EIA-485
DESCRIPTION
The SN65MLVD047A is a quadruple line driver that
complies with the TIA/EIA-899 standard, Electrical
Characteristics of Multipoint-Low-Voltage Differential
Signaling (M−LVDS). The output current of this M−LVDS
device has been increased, in comparison to standard
LVDS compliant devices, in order to support doubly
terminated transmission lines and heavily loaded
backplane bus applications. Backplane applications
generally require impedance matching termination
resistors at both ends of the bus. The effective impedance
of a doubly terminated bus can be as low as 30 Ω due to
the bus terminations, as well as the capacitive load of bus
interface devices. SN65MLVD047A drivers allow for
operation with loads as low as 30 Ω. The SN65MLVD047A
devices allow for multiple drivers to be present on a single
bus. SN65MLVD047A drivers are high impedance when
disabled or unpowered. Driver edge rate control is
incorporated to support operation. The M−LVDS standard
allows up to 32 nodes (drivers and/or receivers) to be
connected to the same media in a backplane when
multiple bus stubs are expected from the main
transmission line to interface devices. The
SN65MLVD047A provides 9-kV ESD protection on all bus
pins.
LOGIC DIAGRAM (POSITIVE LOGIC)
EN
EN
1Y
1A
1Z
2A
2Y
2Z
3Y
3A
3Z
4Y
4A
4Z
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semiconductor products and disclaimers thereto appears at the end of this data sheet.
(1)_{The data rate of a line, is the number of voltage transitions that are made per second expressed in the units bps (bits per second).}
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PRODUCTION DATA information is current as of publication date. Products
conform to specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all parameters.
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