SN65LV1023A-EP Datasheet, PDF (1/25 Pages) Texas Instruments – 10-MHz To 66-MHz, 10:1 LVDS SERIALIZER/DESERIALIZER

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SN65LV1023A-EP
SN65LV1224B-EP
SGLS358 – SEPTEMBER 2006
10-MHz To 66-MHz, 10:1 LVDS SERIALIZER/DESERIALIZER
FEATURES
• Controlled Baseline
– One Assembly/Test Site, One Fabrication
Site
• Extended Temperature Performance of –55°C
to 125°C
• Enhanced Diminishing Manufacturing
Sources (DMS) Support
• Enhanced Product-Change Notification
• Qualification Pedigree ⁽¹⁾
(1) Component qualification in accordance with JEDEC and
industry standards to ensure reliable operation over an
extended temperature range. This includes, but is not limited
to, Highly Accelerated Stress Test (HAST) or biased 85/85,
temperature cycle, autoclave or unbiased HAST,
electromigration, bond intermetallic life, and mold compound
life. Such qualification testing should not be viewed as
justifying use of this component beyond specified
performance and environmental limits.
• 100-Mbps to 660-Mbps Serial LVDS Data
Payload Bandwidth at 10-MHz to 66-MHz
System Clock
• Pin-Compatible Superset of
DS92LV1023/DS92LV1224
• Chipset (Serializer/Deserializer) Power
Consumption <450 mW (Typ) at 66 MHz
• Synchronization Mode for Faster Lock
• Lock Indicator
• No External Components Required for PLL
• 28-Pin SSOP and Space Saving 5 × 5 mm
QFN Packages Available
• Programmable Edge Trigger on Clock
• Flow-Through Pinout for Easy PCB Layout
DESCRIPTION
The SN65LV1023A serializer and SN65LV1224B deserializer comprise a 10-bit serdes chipset designed to
transmit and receive serial data over LVDS differential backplanes at equivalent parallel word rates from 10 MHz
to 66 MHz. Including overhead, this translates into a serial data rate between 120-Mbps and 792-Mbps payload
encoded throughput.
Upon power up, the chipset link can be initialized via a synchronization mode with internally generated SYNC
patterns or the deserializer can be allowed to synchronize to random data. By using the synchronization mode,
the deserializer establishes lock within specified, shorter time parameters.
The device can be entered into a power-down state when no data transfer is required. Alternatively, a mode is
available to place the output pins in the high-impedance state without losing PLL lock.
The SN65LV1023A and SN65LV1224B are characterized for operation over ambient air temperature of –55°C to
125°C.
ORDERING INFORMATION
T_A
-55°C to 125°C
-55°C to 125°C
PACKAGE ⁽¹⁾
SSOP - DB
Reel of 2000
SSOP - DB
Reel of 2000
ORDERABLE PART NUMBER
SN65LV1023AMDBREP
SN65LV1224BMDBREP
TOP-SIDE MARKING
LV1023AMEP
LV1224BMEP
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2006, Texas Instruments Incorporated