SN64BCT126A_15 Datasheet, PDF (1/13 Pages) Texas Instruments – QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS

D State-of-the-Art BiCMOS Design
Significantly Reduces I_CCZ
D 3-State Outputs Drive Bus Lines or
Buffer-Memory Address Registers
D ESD Protection Exceeds 2000 V
Per MIL-STD-883 Method 3015
D High-Impedance State During Power Up
and Power Down
D Package Options Include Plastic
Small-Outline (D) and Standard Plastic
300-mil DIPs (N)
SN64BCT126A
QUADRUPLE BUS BUFFER GATE
WITH 3-STATE OUTPUTS
SCBS051C – AUGUST 1990 – REVISED JULY 1998
D OR N PACKAGE
(TOP VIEW)
1OE 1
1A 2
1Y 3
2OE 4
2A 5
2Y 6
GND 7
14 V_CC
13 4OE
12 4A
11 4Y
10 3OE
9 3A
8 3Y
description
The SN64BCT126A bus buffer features independent line drivers with 3-state outputs. Each output is disabled
when the associated output-enable (OE) input is low.
The SN64BCT126A is characterized for operation from – 40°C to 85°C and 0°C to 70°C.
FUNCTION TABLE
(each buffer)
INPUTS
OE
A
OUTPUT
Y
H
H
H
H
L
L
L
X
Z
logic symbol^†
logic diagram (positive logic)
1
1OE
2
1A
4
2OE
5
2A
10
3OE
9
3A
13
4OE
12
4A
EN ¹
3
1Y
6
2Y
8
3Y
11
4Y
† _{This symbol is in accordance with ANSI/IEEE Std 91-1984}
and IEC Publication 617-12.
1
1OE
1A ²
4
2OE
5
2A
10
3OE
9
3A
13
4OE
12
4A
3
1Y
6
2Y
8
3Y
11
4Y
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Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright © 1998, Texas Instruments Incorporated
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