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SN54LVTH162541_08 Datasheet, PDF (1/13 Pages) Texas Instruments – 3.3-V ABT 16-BIT BUFFERS/DRIVERS
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FEATURES
• Members of the Texas Instruments Widebus™
Family
• State-of-the-Art Advanced BiCMOS
Technology (ABT) Design for 3.3-V Operation
and Low Static-Power Dissipation
• Output Ports Have Equivalent 22-Ω Series
Resistors, So No External Resistors Are
Required
• Support Mixed-Mode Signal Operation (5-V
Input and Output Voltages With 3.3-V VCC)
• Support Unregulated Battery Operation Down
to 2.7 V
• Typical VOLP (Output Ground Bounce) <0.8 V
at VCC = 3.3 V, TA = 25°C
• Ioff and Power-Up 3-State Support Hot
Insertion
• Bus Hold on Data Inputs Eliminates the Need
for External Pullup/Pulldown Resistors
• Distributed VCC and GND Pin Configuration
Minimizes High-Speed Switching Noise
• Flow-Through Architecture Optimizes PCB
Layout
• Latch-Up Performance Exceeds 500 mA Per
JESD 17
• ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
• Package Options Include Plastic Shrink
Small-Outline (DL) and Thin Shrink
Small-Outline (DGG) Packages and 380-mil
Fine-Pitch Ceramic Flat (WD) Package Using
25-mil Center-to-Center Spacings
SN54LVTH162541, SN74LVTH162541
3.3-V ABT 16-BIT BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCBS690F – MAY 1997 – REVISED NOVEMBER 2006
SN54LVTH162541 . . . WD PACKAGE
SN74LVTH162541 . . . DGG OR DL PACKAGE
(TOP VIEW)
1OE1 1
1Y1 2
1Y2 3
GND 4
1Y3 5
1Y4 6
VCC 7
1Y5 8
1Y6 9
GND 10
1Y7 11
1Y8 12
2Y1 13
2Y2 14
GND 15
2Y3 16
2Y4 17
VCC 18
2Y5 19
2Y6 20
GND 21
2Y7 22
2Y8 23
2OE1 24
48 1OE2
47 1A1
46 1A2
45 GND
44 1A3
43 1A4
42 VCC
41 1A5
40 1A6
39 GND
38 1A7
37 1A8
36 2A1
35 2A2
34 GND
33 2A3
32 2A4
31 VCC
30 2A5
29 2A6
28 GND
27 2A7
26 2A8
25 2OE2
DESCRIPTION/ORDERING INFORMATION
These 16-bit buffers/drivers are designed specifically for low-voltage (3.3-V) VCC operation, but with the
capability to provide a TTL interface to a 5-V system environment.
These devices are noninverting 16-bit buffers composed of two 8-bit sections with separate output-enable
signals. For either 8-bit buffer section, the two output-enable (1OE1 and 1OE2 or 2OE1 and 2OE2) inputs must
be low for the corresponding Y outputs to be active. If either output-enable input is high, the outputs of that 8-bit
buffer section are in the high-impedance state.
The outputs, which are designed to source or sink up to 12 mA, include equivalent 22-Ω series resistors to
reduce overshoot and undershoot.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1997–2006, Texas Instruments Incorporated