SN54LV164A_15 Datasheet, PDF (1/30 Pages) Texas Instruments – 8-Bit Parallel-Out Serial Shift Registers

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SN54LV164A, SN74LV164A
SCLS403I – APRIL 1998 – REVISED MARCH 2015
SNx4LV164A 8-Bit Parallel-Out Serial Shift Registers
1 Features
•1 2-V to 5.5-V V_CC Operation
• Maximum t_pd of 10.5 ns at 5 V
• Typical V_OLP (Output Ground Bounce)
< 0.8 V at V_CC = 3.3 V, T_A = 25°C
• Typical V_OHV (Output V_OH Undershoot)
> 2.3 V at V_CC = 3.3 V, T_A = 25°C
• Ioff Supports Live Insertion, Partial Power-Down
Mode, and Back-Drive Protection
• Support Mixed-Mode Voltage Operation on
All Ports
• Latch-up Performance Exceeds 250 mA
Per JESD 17
• ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 1000-V Charged-Device Model (C101)
2 Applications
• IP Routers
• Enterprise Switches
• Access Control and Security: Access Keypads
and Biometrics
• Smart Meters: Power Line Communication
3 Description
The SNx4LV164A devices are 8-bit parallel-out serial
shift registers designed for 2-V to 5.5-V V_CC
operation.
Device Information⁽¹⁾
PART NUMBER PACKAGE
BODY SIZE (NOM)
SOIC (14)
8.65 mm × 3.91 mm
SSOP (14)
6.20 mm × 5.30 mm
SN74LV164A
TVSOP (14)
SOP (14)
3.60 mm × 4.40 mm
10.30 mm × 5.30 mm
TSSOP (14)
5.00 mm × 4.40 mm
VQFN (14)
3.50 mm × 3.50 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Logic Diagram (Positive Logic)
8
CLK
1
A
2
B
C1
1D
R
C1
1D
R
C1
1D
R
C1
1D
R
CLR ⁹
3
4
5
6
Q_A
Q_B
Q_C
Q_D
Pin numbers shown are for the D, DB, DGV, J, NS, PW, RGY, and W packages.
C1
1D
R
C1
1D
R
C1
1D
R
C1
1D
R
10
Q_E
11
Q_F
12
Q_G
13
Q_H
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. UNLESS OTHERWISE NOTED, this document contains PRODUCTION
DATA.