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SN54HCT623_16 Datasheet, PDF (1/12 Pages) Texas Instruments – OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
D Operating Voltage Range of 4.5 V to 5.5 V
D Low Power Consumption, 80-µA Max ICC
D Typical tpd = 11 ns
D ±6-mA Output Drive at 5 V
D Low Input Current of 1 µA Max
SN54HCT623 . . . J OR W PACKAGE
SN74HCT623 . . . DW OR N PACKAGE
(TOP VIEW)
SN54HCT623, SN74HCT623
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCLS016C – MARCH 1984 – REVISED MARCH 2003
D Inputs Are TTL-Voltage Compatible
D Lock Bus-Latch Capability
D True Logic
D High-Current 3-State Outputs Can Drive Up
To 15 LSTTL Loads
SN54HCT623 . . . FK PACKAGE
(TOP VIEW)
OEAB 1
A1 2
A2 3
A3 4
A4 5
A5 6
A6 7
A7 8
A8 9
GND 10
20 VCC
19 OEBA
18 B1
17 B2
16 B3
15 B4
14 B5
13 B6
12 B7
11 B8
A3
3 2 1 20 19
4
18
B1
A4 5
17 B2
A5 6
16 B3
A6 7
15 B4
A7 8
14 B5
9 10 11 12 13
description/ordering information
These octal bus transceivers are designed for asynchronous two-way communication between data buses. The
control-function implementation allows for maximum flexibility in timing.
The ’HCT623 devices allow data transmission from the A bus to the B bus or from the B bus to the A bus,
depending upon the logic levels at the output-enable (OEAB and OEBA) inputs.
The output-enable inputs disable the device so that the buses are effectively isolated. The dual-enable
configuration gives the transceivers the capability to store data by simultaneously enabling OEAB and OEBA.
Each output reinforces its input in this transceiver configuration. When both OEAB and OEBA are enabled and
all other data sources to the two sets of bus lines are in the high-impedance state, both sets of bus lines (16 total)
remain at their last states. The 8-bit codes appearing on the two sets of buses are identical.
To ensure the high-impedance state during power up or power down, OEBA should be tied to VCC through a
pullup resistor and OEAB should be tied to GND through a pulldown resistor; the minimum value of the resistor
is determined by the current-sinking/current-sourcing capability of the driver.
ORDERING INFORMATION
TA
PACKAGE†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
–40°C to 85°C
PDIP – N
SOIC – DW
Tube
Tube
SN74HCT623N
SN74HCT623DW
SN74HCT623N
HCT623
CDIP – J
Tube
SNJ54HCT623J
SNJ54HCT623J
–55°C to 125°C CFP – W
Tube
SNJ54HCT623W
SNJ54HCT623W
LCCC – FK
Tube
SNJ54HCT623FK
SNJ54HCT623FK
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
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Copyright  2003, Texas Instruments Incorporated
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