SN54ALS113A Datasheet, PDF (1/4 Pages) Texas Instruments – DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET

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SN54ALS113A, SN74ALS113A
DUAL JĆK NEGATIVEĆEDGEĆTRIGGERED FLIPĆFLOPS
WITH PRESET
SDAS200 − D2661, APRIL 1982 − REVISED MAY 1986
• Fully Buffered to Offer Maximum isolation
from External Disturbance
• Package Options Include Plastic Small
Outline Packages, Ceramic Chip Carriers,
and Standard Plastic and Ceramic 300-mil
DIPs
• Dependable Texas Instruments Quality and
Reliability
TYPE
’ALS113A
TYPICAL MAXIMUM
CLOCK FREQUENCY
40 MHz (CL=15 pF)
TYPICAL POWER
DISSIPATION
PER FLIP-FLOP
6 mW
description
SN54ALS113A . . . J PACKAGE
SN74ALS113A . . . D OR N PACKAGE
(TOP VIEW)
1 CLK 1
1K 2
1J 3
1PRE 4
1Q 5
1Q 6
GND 7
14 V_CC
13 2CLK
12 ^2K
11 ^2J
10 ^2PRE
9 ^2Q
8 ^2Q
SN54ALS113A . . . FK PACKAGE
(TOP VIEW)
These devices contain two independent J-K
negative-edge-triggered flip-flops. A low level at
the Preset input sets the outputs regardless of the
levels of the other inputs. When Preset PRE is
inactive (high), data at the J and K inputs meeting
the setup time requirements are transferred to the
outputs on the negative-going edge of the clock
pulse. Clock triggering occurs at a voltage level
and is not directly related to the fall time of the
clock pulse. Following the hold time interval, data
at the J and K inputs may be changed without
affecting the levels at the outputs. These versatile
flip-flops can perform as toggle flip-flops by tying
J and K high.
The SN54ALS113A is characterized for operation
over the full military temperature range of − 55°C
to 125°C. The SN74ALS113A is characterized for
operation from 0°C to 70°C.
PRE
L
H
H
H
H
H
FUNCTION TABLE
INPUTS
OUTPUTS
CLK J
K
Q
Q
X
X
X
H
L
↓
L
L
Q0
Q0
↓
H
L
H
L
↓
L
H
L
H
↓
H
H
TOGGLE
H
X
X
Q0
Q0
1J
NC
1PRE
NC
1Q
3 2 1 20 19
4
18
5
17
6
16
7
15
8
14
9 10 11 12 13
2K
NC
2J
NC
2PRE
NC−No internal connection
logic symbol^†
4
1PRE
3
1J
1
1CLK
2
1K
10
2PRE
11
2J
13
2CLK
12
2K
S
1J
C1
1K
5
1Q
6
1Q
9
2Q
8
2Q
† _{This symbol is in accordance with ANSI/IEEE Std 91-1984 and}
IEC Publication 617-12.
Pin numbers shown are for D, J, and N packages.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
• POST OFFICE BOX 1443 HOUSTON, TEXAS 77001
Copyright  1986, Texas Instruments Incorporated
5BASIC
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