SN54ALS01_08 Datasheet, PDF (1/3 Pages) Texas Instruments – QUADRUPLE 2-INPUT POSITIVE-NAND GATES WITH OPEN-COLLECTOR OUTPUTS

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SN54ALS01, SN74ALS01
QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATES
WITH OPENĆCOLLECTOR OUTPUTS
SDAS188 − D2661, APRIL 1982 − REVISED MAY 1986
• Package Options Include Plastic Small
Outline Packages, Ceramic Chip Carriers,
and Standard Plastic and Ceramic 300-mil
DIPs
• Dependable Texas Instruments Quality and
Reliability
description
These devices contain four independent 2-input
NAND gates. They perform the Boolean functions
Y = A•B or Y = A+B in positive logic. The
open-collector outputs require pullup resistors to
perform correctly. They may be connected to other
open-collector outputs to implement active-low
wired-OR or active-high wired-AND functions.
Open-collector devices are often used to generate
higher V_OH levels.
The SN54ALS01 is characterized for operation
over the full military temperature range of − 55°C
to 125°C. The SN74ALS01 is characterized for
operation from 0°C to 70°C.
FUNCTION TABLE
(each gate)
INPUTS OUTPUT
AB
Y
HH
L
LX
H
XL
H
SN54ALS01 . . . J PACKAGE
SN74ALS01 . . . D OR N PACKAGE
(TOP VIEW)
1Y 1
1A 2
1B 3
2Y 4
2A 5
2B 6
GND 7
14 V_CC
13 4Y
12 ^4B
11 ^4A
10 ^3Y
9 ^3B
8 ^3A
SN54ALS01 . . . FK PACKAGE
(TOP VIEW)
1B
3 2 1 20 19
4
18
4B
NC ₅
17 ^NC
2Y 6
16 4A
NC 7
15 NC
2A 8
14 3Y
9 10 11 12 13
NC −No internal connection
logic symbol^†
1A ²
&
1B ³
2A ⁵
2B ⁶
3A ⁸
3B ⁹
4A ¹¹
4B ¹²
1 _1Y
4 _2Y
10 _3Y
13 _4Y
† _{This symbol is in accordance with ANSI/IEEE Std 91-1984 and}
IEC Publication 617-12.
Pin numbers shown are for D, J, and N packages.
logic diagram (positive logic)
1A
1Y
1B
2A
2Y
2B
3A
3Y
3B
4A
4Y
4B
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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Copyright  1986, Texas Instruments Incorporated
5BASIC
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