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SN54AC534_16 Datasheet, PDF (1/18 Pages) Texas Instruments – OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
SN54AC534, SN74AC534
OCTAL EDGEĆTRIGGERED DĆTYPE FLIPĆFLOPS
WITH 3ĆSTATE OUTPUTS
SCAS554D − NOVEMBER 1995 − REVISED OCTOBER 2003
D 2-V to 6-V VCC Operation
D Inputs Accept Voltages to 6 V
D Max tpd of 11 ns at 5 V
D 3-State Inverting Outputs Drive Bus Lines
Directly
D Full Parallel Access for Loading
description/ordering information
These octal edge-triggered D-type flip-flops
feature 3-state outputs designed specifically for
driving highly capacitive or relatively
low-impedance loads. The devices are
particularly suitable for implementing buffer
registers, I/O ports, bidirectional bus drivers, and
working registers.
On the positive transition of the clock (CLK) input,
the Q outputs are set to the complements of the
logic levels set up at the data (D) inputs.
A buffered output-enable (OE) input can be used
to place the eight outputs in either a normal logic
state (high or low logic levels) or the
high-impedance state. In the high-impedance
state, the outputs neither load nor drive the bus
lines significantly. The high-impedance state and
increased drive provide the capability to drive bus
lines without need for interface or pullup
components.
SN54AC534 . . . J OR W PACKAGE
SN74AC534 . . . DB, DW, N, NS, OR PW PACKAGE
(TOP VIEW)
OE 1
1Q 2
1D 3
2D 4
2Q 5
3Q 6
3D 7
4D 8
4Q 9
GND 10
20 VCC
19 8Q
18 8D
17 7D
16 7Q
15 6Q
14 6D
13 5D
12 5Q
11 CLK
SN54AC534 . . . FK PACKAGE
(TOP VIEW)
3 2 1 20 19
2D 4
18 8D
2Q 5
17 7D
3Q 6
16 7Q
3D 7
15 6Q
4D 8
14 6D
9 10 11 12 13
OE does not affect internal operations of the flip-flops. Old data can be retained or new data can be entered
while the outputs are in the high-impedance state.
ORDERING INFORMATION
TA
PACKAGE†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
PDIP − N
Tube
SN74AC534N
SN74AC534N
SOIC − DW
Tube
Tape and reel
SN74AC534DW
SN74AC534DWR
AC534
−40°C to 85°C
SOP − NS
SSOP − DB
Tape and reel
Tape and reel
SN74AC534NSR
SN74AC534DBR
AC534
AC534
TSSOP − PW
Tube
Tape and reel
SN74AC534PW
SN74AC534PWR
AC534
CDIP − J
Tube
SNJ54AC534J
SNJ54AC534J
−55°C to 125°C CFP − W
Tube
SNJ54AC534W
SNJ54AC534W
LCCC − FK
Tube
SNJ54AC534FK
SNJ54AC534FK
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
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Copyright  2003, Texas Instruments Incorporated
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