SN54AC373_16 Datasheet, PDF (1/22 Pages) Texas Instruments – OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS

SN54AC373, SN74AC373
OCTAL D-TYPE TRANSPARENT LATCHES
WITH 3-STATE OUTPUTS
SCAS540D − OCTOBER 1995 − REVISED OCTOBER 2003
D 2-V to 6-V V_CC Operation
D Inputs Accept Voltages to 6 V
D Max t_pd of 9.5 ns at 5 V
D 3-State Noninverting Outputs Drive Bus
Lines Directly
D Full Parallel Access for Loading
description/ordering information
These 8-bit latches feature 3-state outputs
designed specifically for driving highly capacitive
or relatively low-impedance loads. The devices
are particularly suitable for implementing buffer
registers, I/O ports, bidirectional bus drivers, and
working registers.
The eight latches are D-type transparent latches.
When the latch-enable (LE) input is high, the Q
outputs follow the data (D) inputs. When LE is
taken low, the Q outputs are latched at the logic
levels set up at the D inputs.
A buffered output-enable (OE) input can be used
to place the eight outputs in either a normal logic
state (high or low logic levels) or the
high-impedance state. In the high-impedance
state, the outputs neither load nor drive the bus
lines significantly. The high-impedance state and
increased drive provide the capability to drive bus
lines in bus-organized systems without need for
interface or pullup components.
SN54AC373 . . . J OR W PACKAGE
SN74AC373 . . . DB, DW, N, NS, OR PW PACKAGE
(TOP VIEW)
OE ¹
1Q ²
1D ³
2D ⁴
2Q ⁵
3Q ⁶
3D ⁷
4D ⁸
4Q ⁹
GND ¹⁰
20 _VCC
19 _8Q
18 _8D
17 _7D
16 _7Q
15 _6Q
14 _6D
13 _5D
12 _5Q
11 _LE
SN54AC373 . . . FK PACKAGE
(TOP VIEW)
2D
3 2 1 20 19
4
18
8D
2Q ₅
17 ^7D
3Q 6
16 7Q
3D 7
15 6Q
4D 8
14 6D
9 10 11 12 13
OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered
while the outputs are in the high-impedance state.
ORDERING INFORMATION
T_A
PACKAGE^†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
PDIP − N
Tube
SN74AC373N
SN74AC373N
SOIC − DW
Tube
Tape and reel
SN74AC373DW
SN74AC373DWR
AC373
−40°C to 85°C SOP − NS
Tape and reel SN74AC373NSR
AC373
SSOP − DB
Tape and reel SN74AC373DBR
AC373
TSSOP − PW
Tube
Tape and reel
SN74AC373PW
SN74AC373PWR
AC373
CDIP − J
Tube
SNJ54AC373J
SNJ54AC373J
−55°C to 125°C CFP − W
Tube
SNJ54AC373W
SNJ54AC373W
LCCC − FK
Tube
SNJ54AC373FK
SNJ54AC373FK
† _{Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are}
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright © 2003, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
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