SN54ABTH162245_09 Datasheet, PDF (1/11 Pages) Texas Instruments – 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

D Members of the Texas Instruments
Widebus ™ Family
D A-Port Outputs Have Equivalent 25-Ω
Series Resistors, So No External Resistors
Are Required
D State-of-the-Art EPIC-ΙΙB™ BiCMOS Design
Significantly Reduces Power Dissipation
D Typical V_OLP (Output Ground Bounce)
< 1 V at V_CC = 5 V, T_A = 25°C
D Distributed V_CC and GND Pin Configuration
Minimizes High-Speed Switching Noise
D Flow-Through Architecture Optimizes PCB
Layout
D Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors
D Latch-Up Performance Exceeds 500 mA Per
JESD 17
D ESD Protection Exceeds 2000 V Per
MIL-STD-833, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
D Package Options Include Plastic Thin
Shrink Small-Outline (DGG), Thin Very
Small-Outline (DGV), and Shrink
Small-Outline (DL) Packages and 380-mil
Fine-Pitch Ceramic Flat (WD) Package
Using 25-mil Center-to-Center Spacings
SN54ABTH162245, SN74ABTH162245
16-BIT BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS712A – FEBRUARY 1998 – REVISED APRIL 1999
SN54ABTH162245 . . . WD PACKAGE
SN74ABTH162245 . . . DGG, DGV, OR DL PACKAGE
(TOP VIEW)
1DIR 1
1B1 2
1B2 3
GND 4
1B3 5
1B4 6
V_CC 7
1B5 8
1B6 9
GND 10
1B7 11
1B8 12
2B1 13
2B2 14
GND 15
2B3 16
2B4 17
V_CC 18
2B5 19
2B6 20
GND 21
2B7 22
2B8 23
2DIR 24
48 1OE
47 1A1
46 1A2
45 GND
44 1A3
43 1A4
42 V_CC
41 1A5
40 1A6
39 GND
38 1A7
37 1A8
36 2A1
35 2A2
34 GND
33 2A3
32 2A4
31 V_CC
30 2A5
29 2A6
28 GND
27 2A7
26 2A8
25 2OE
description
The ’ABTH162245 devices are 16-bit noninverting 3-state transceivers designed for synchronous two-way
communication between data buses. The control-function implementation minimizes external timing
requirements.
These devices can be used as two 8-bit transceivers or one 16-bit transceiver. They allow data transmission
from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control
(DIR) input. The output-enable (OE) input can be used to disable the device so that the buses are effectively
isolated.
The A-port outputs, which are designed to source or sink up to 12 mA, include equivalent 25-Ω series resistors
to reduce overshoot and undershoot.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
To ensure the high-impedance state during power up or power down, OE should be tied to V_CC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The SN54ABTH162245 is characterized for operation over the full military temperature range of –55°C to
125°C. The SN74ABTH162245 is characterized for operation from –40°C to 85°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus and EPIC-ΙΙB are trademarks of Texas Instruments Incorporated.
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
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Copyright © 1999, Texas Instruments Incorporated
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