SN54ABT543 Datasheet, PDF (1/7 Pages) Texas Instruments – OCTAL REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS

• State-of-the-Art EPIC-ΙΙB BiCMOS Design
Significantly Reduces Power Dissipation
• ESD Protection Exceeds 2000 V Per
MIL-STD-883C, Method 3015; Exceeds
200 V Using Machine Model (C = 200 pF,
R = 0)
• Latch-Up Performance Exceeds 500 mA
Per JEDEC Standard JESD-17
• Typical V_OLP (Output Ground Bounce)
< 1 V at V_CC = 5 V, T_A = 25°C
• High-Drive Outputs (− 32-mA I_OH,
64-mA I_OL )
• Package Options Include Plastic
Small-Outline (DW) and Shrink
Small-Outline (DB) Packages, Ceramic
Chip Carriers (FK), and Plastic (NT) and
Ceramic (JT) DIPs
description
SN54ABT543, SN74ABT543
OCTAL REGISTERED TRANSCEIVERS
WITH 3ĆSTATE OUTPUTS
SCBS157A − JANUARY 1991 − REVISED JULY 1994
SN54ABT543 . . . JT PACKAGE
SN74ABT543 . . . DB, DW, OR NT PACKAGE
(TOP VIEW)
LEBA 1
OEBA 2
A1 3
A2 4
A3 5
A4 6
A5 7
A6 8
A7 9
A8 10
CEAB 11
GND 12
24 V_CC
23 CEBA
22 B1
21 B2
20 B3
19 B4
18 B5
17 B6
16 B7
15 B8
14 LEAB
13 OEAB
SN54ABT543 . . . FK PACKAGE
(TOP VIEW)
The ′ABT543 octal transceivers contain two sets
of D-type latches for temporary storage of data
flowing in either direction. Separate latch-enable
(LEAB or LEBA) and output-enable (OEAB or
OEBA) inputs are provided for each register to
permit independent control in either direction of
data flow.
The A-to-B enable (CEAB) input must be low in
order to enter data from A or to output data from
B. If CEAB is low and LEAB is low, the A-to-B
latches are transparent; a subsequent low-to-high
transition of LEAB puts the A latches in the storage
mode. With CEAB and OEAB both low, the 3-state
B outputs are active and reflect the data present
at the output of the A latches. Data flow from B to
A is similar but requires using the CEBA, LEBA,
and OEBA inputs.
4 3 2 1 28 27 26
A2 5
25 B2
A3 6
24 B3
A4 7
23 B4
NC 8
22 NC
A5 9
21 B5
A6 10
20 B6
A7 11
19 _B7
12 13 14 15 16 17 18
NC − No internal connection
To ensure the high-impedance state during power up or power down, OE should be tied to V_CC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The SN74ABT543 is available in TI’s shrink small-outline package (DB), which provides the same I/O pin count
and functionality of standard small-outline packages in less than half the printed-circuit-board area.
The SN54ABT543 is characterized for operation over the full military temperature range of −55°C to 125°C. The
SN74ABT543 is characterized for operation from − 40°C to 85°C.
EPIC-ΙΙB is a trademark of Texas Instruments Incorporated.
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
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Copyright  1994, Texas Instruments Incorporated
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