SN54ABT377_16 Datasheet, PDF (1/22 Pages) Texas Instruments – OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLOCK ENABLE

SN54ABT377, SN74ABT377A
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS
WITH CLOCK ENABLE
SCBS156E – FEBRUARY 1991 – REVISED JANUARY 1997
D State-of-the-Art EPIC-ΙΙB™ BiCMOS Design
Significantly Reduces Power Dissipation
D Latch-Up Performance Exceeds 500 mA Per
JEDEC Standard JESD-17
D Typical V_OLP (Output Ground Bounce) < 1 V
at V_CC = 5 V, T_A = 25°C
D High-Drive Outputs (–32-mA I_OH, 64-mA I_OL)
D ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
D Package Options Include Plastic
Small-Outline (DW), Shrink Small-Outline
(DB), and Thin Shrink Small-Outline (PW)
Packages, Ceramic Chip Carriers (FK),
Plastic (N) and Ceramic (J) DIPs, and
Ceramic Flat (W) Package
SN54ABT377 . . . J OR W PACKAGE
SN74ABT377A . . . DB, DW, N, OR PW PACKAGE
(TOP VIEW)
CLKEN 1
1Q 2
1D 3
2D 4
2Q 5
3Q 6
3D 7
4D 8
4Q 9
GND 10
20 V_CC
19 8Q
18 8D
17 7D
16 7Q
15 6Q
14 6D
13 5D
12 5Q
11 CLK
SN54ABT377 . . . FK PACKAGE
(TOP VIEW)
description
These 8-bit positive-edge-triggered D-type
flip-flops with a clock (CLK) input are particularly
suitable for implementing buffer and storage
registers, shift registers, and pattern generators.
Data (D) input information that meets the setup
time requirements is transferred to the Q outputs
on the positive-going edge of the clock pulse if the
common clock-enable (CLKEN) input is low.
Clock triggering occurs at a particular voltage
level and is not directly related to the transition
time of the positive-going pulse. When the
buffered clock (CLK) input is at either the high or
low level, the D-input signal has no effect at the
output. The circuits are designed to prevent false
clocking by transitions at CLKEN.
2D
3 2 1 20 19
4
18
8D
2Q ₅
17 7D
3Q 6
16 7Q
3D 7
15 6Q
4D 8
14 6D
9 10 11 12 13
The SN54ABT377 is characterized for operation over the full military temperature range of –55°C to 125°C. The
SN74ABT377A is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
(each flip-flop)
INPUTS
CLKEN CLK D
OUTPUT
Q
H
X
X
Q0
L
↑
H
H
L
↑
L
L
X H or L X
Q0
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC-ΙΙB is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright © 1997, Texas Instruments Incorporated
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
1